Re: [PATCH v3 02/12] firmware: qcom_scm: Rename peripheral as pas_id

Bryan O'Donoghue
2025-09-21T21:31:07Z

On 20/09/2025 20:41, Mukesh Ojha wrote:
> Peripheral and pas_id refers to unique id for a subsystem and used only
> when peripheral authentication service from secure world is utilized.
>
> Lets rename peripheral to pas_id to reflect closer to its meaning.
>
> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
> ---
> drivers/firmware/qcom/qcom_scm.c | 30 +++++++++++++++---------------
> include/linux/firmware/qcom/qcom_scm.h | 10 +++++-----
> 2 files changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
> index e777b7cb9b12..3379607eaf94 100644
> --- a/drivers/firmware/qcom/qcom_scm.c
> +++ b/drivers/firmware/qcom/qcom_scm.c
> @@ -562,7 +562,7 @@ static void qcom_scm_set_download_mode(u32 dload_mode)
> * qcom_scm_pas_init_image() - Initialize peripheral authentication service
> * state machine for a given peripheral, using the
> * metadata
> - * @peripheral: peripheral id
> + * @pas_id: peripheral authentication service id
> * @metadata: pointer to memory containing ELF header, program header table
> * and optional blob of data used for authenticating the metadata
> * and the rest of the firmware
> @@ -575,7 +575,7 @@ static void qcom_scm_set_download_mode(u32 dload_mode)
> * track the metadata allocation, this needs to be released by invoking
> * qcom_scm_pas_metadata_release() by the caller.
> */
> -int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
> +int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size,
> struct qcom_scm_pas_metadata *ctx)
> {
> dma_addr_t mdata_phys;
> @@ -585,7 +585,7 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
> .svc = QCOM_SCM_SVC_PIL,
> .cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE,
> .arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW),
> - .args[0] = peripheral,
> + .args[0] = pas_id,
> .owner = ARM_SMCCC_OWNER_SIP,
> };
> struct qcom_scm_res res;
> @@ -658,20 +658,20 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_metadata_release);
> /**
> * qcom_scm_pas_mem_setup() - Prepare the memory related to a given peripheral
> * for firmware loading
> - * @peripheral: peripheral id
> + * @pas_id: peripheral authentication service id
> * @addr: start address of memory area to prepare
> * @size: size of the memory area to prepare
> *
> * Returns 0 on success.
> */
> -int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size)
> +int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size)
> {
> int ret;
> struct qcom_scm_desc desc = {
> .svc = QCOM_SCM_SVC_PIL,
> .cmd = QCOM_SCM_PIL_PAS_MEM_SETUP,
> .arginfo = QCOM_SCM_ARGS(3),
> - .args[0] = peripheral,
> + .args[0] = pas_id,
> .args[1] = addr,
> .args[2] = size,
> .owner = ARM_SMCCC_OWNER_SIP,
> @@ -699,18 +699,18 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_mem_setup);
> /**
> * qcom_scm_pas_auth_and_reset() - Authenticate the given peripheral firmware
> * and reset the remote processor
> - * @peripheral: peripheral id
> + * @pas_id: peripheral authentication service id
> *
> * Return 0 on success.
> */
> -int qcom_scm_pas_auth_and_reset(u32 peripheral)
> +int qcom_scm_pas_auth_and_reset(u32 pas_id)
> {
> int ret;
> struct qcom_scm_desc desc = {
> .svc = QCOM_SCM_SVC_PIL,
> .cmd = QCOM_SCM_PIL_PAS_AUTH_AND_RESET,
> .arginfo = QCOM_SCM_ARGS(1),
> - .args[0] = peripheral,
> + .args[0] = pas_id,
> .owner = ARM_SMCCC_OWNER_SIP,
> };
> struct qcom_scm_res res;
> @@ -735,18 +735,18 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_auth_and_reset);
>
> /**
> * qcom_scm_pas_shutdown() - Shut down the remote processor
> - * @peripheral: peripheral id
> + * @pas_id: peripheral authentication service id
> *
> * Returns 0 on success.
> */
> -int qcom_scm_pas_shutdown(u32 peripheral)
> +int qcom_scm_pas_shutdown(u32 pas_id)
> {
> int ret;
> struct qcom_scm_desc desc = {
> .svc = QCOM_SCM_SVC_PIL,
> .cmd = QCOM_SCM_PIL_PAS_SHUTDOWN,
> .arginfo = QCOM_SCM_ARGS(1),
> - .args[0] = peripheral,
> + .args[0] = pas_id,
> .owner = ARM_SMCCC_OWNER_SIP,
> };
> struct qcom_scm_res res;
> @@ -772,18 +772,18 @@ EXPORT_SYMBOL_GPL(qcom_scm_pas_shutdown);
> /**
> * qcom_scm_pas_supported() - Check if the peripheral authentication service is
> * available for the given peripherial
> - * @peripheral: peripheral id
> + * @pas_id: peripheral authentication service id
> *
> * Returns true if PAS is supported for this peripheral, otherwise false.
> */
> -bool qcom_scm_pas_supported(u32 peripheral)
> +bool qcom_scm_pas_supported(u32 pas_id)
> {
> int ret;
> struct qcom_scm_desc desc = {
> .svc = QCOM_SCM_SVC_PIL,
> .cmd = QCOM_SCM_PIL_PAS_IS_SUPPORTED,
> .arginfo = QCOM_SCM_ARGS(1),
> - .args[0] = peripheral,
> + .args[0] = pas_id,
> .owner = ARM_SMCCC_OWNER_SIP,
> };
> struct qcom_scm_res res;
> diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
> index a55ca771286b..a13f703b16cd 100644
> --- a/include/linux/firmware/qcom/qcom_scm.h
> +++ b/include/linux/firmware/qcom/qcom_scm.h
> @@ -72,13 +72,13 @@ struct qcom_scm_pas_metadata {
> ssize_t size;
> };
>
> -int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
> +int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size,
> struct qcom_scm_pas_metadata *ctx);
> void qcom_scm_pas_metadata_release(struct qcom_scm_pas_metadata *ctx);
> -int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size);
> -int qcom_scm_pas_auth_and_reset(u32 peripheral);
> -int qcom_scm_pas_shutdown(u32 peripheral);
> -bool qcom_scm_pas_supported(u32 peripheral);
> +int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size);
> +int qcom_scm_pas_auth_and_reset(u32 pas_id);
> +int qcom_scm_pas_shutdown(u32 pas_id);
> +bool qcom_scm_pas_supported(u32 pas_id);
>
> int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
> int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
>
> --
> 2.50.1
>
>

Thanks, thats a more comprehensive patch than I had expected.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

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