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X-OriginatorOrg: opensource.cirrus.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Oct 2025 13:15:22.2009 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b0b4777d-d260-4241-b14f-08de05a39240 X-MS-Exchange-CrossTenant-Id: bec09025-e5bc-40d1-a355-8e955c307de8 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=bec09025-e5bc-40d1-a355-8e955c307de8;Ip=[84.19.233.75];Helo=[edirelay1.ad.cirrus.com] X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TreatMessagesAsInternal-SN1PEPF000397AF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS1PR19MB8619 X-Proofpoint-ORIG-GUID: coh9IeQnqOjaorMDgzSHwD5PD6N5Ak80 X-Proofpoint-GUID: coh9IeQnqOjaorMDgzSHwD5PD6N5Ak80 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA3MDEwNSBTYWx0ZWRfXzPmVFowfX4rg S+MLCDHYpbSiRDVHVjUc7Qhi5oBZ0wkC9z69flAffvm1/gIr7XtH/l+WCrivEHtTYNrS5DPNUmw 3vHgRUa436trk6UxWIWb68zsgxThYydd29J7UO8PF+nZe3w0HGdXe144I5ndGeS2hCQKRTDz79G JrvjelOrgJ/TqeI3ticX6x875pVvs/VDfsX2z3VWuxFFUADVwZ1xDwVxiivChcfpgjUASIE8oae ZoqVL5aZOKYh8YdXb7K+rjvNT7V9Opb2+YVCFpjueRYU/lNgQpyKDX+QGj6ALq8LMeJtKopNRbd +J3fuomWSB/XakDDk68ND7Cw9JlhknEG7vFv+RqElZOCZgGjg5cgS4m14nxqhUWwh5fACYb1UwV vj8m4kQMnuH8pxY/8zdRIzrsBKsoeA== X-Authority-Analysis: v=2.4 cv=ePceTXp1 c=1 sm=1 tr=0 ts=68e5126e cx=c_pps a=+WkigaN7fx4UYWmYucrQAQ==:117 a=h1hSm8JtM9GN1ddwPAif2w==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=s63m1ICgrNkA:10 a=RWc_ulEos4gA:10 a=w1d2syhTAAAA:8 a=1qH_0-QTjpgOK4Tlm7cA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-Spam-Reason: safe On Tue, Oct 07, 2025 at 08:48:40PM +0800, Sune Brian wrote: > Charles Keepax 於 2025年10月7日 週二 下午8:11寫道： > > On Tue, Oct 07, 2025 at 07:22:10PM +0800, Sune Brian wrote: > > > Charles Keepax 於 2025年10月7日 週二 下午6:30寫道： > > > > On Fri, Oct 03, 2025 at 05:13:04PM +0800, Brian Sune wrote: > > > > > The original WM8978 codec driver did not set the BCLK (bit clock) > > Its not missing its right there. That said your way is probably > > slightly more standard these days, but we should take care of the > > interaction between the two. > > What my missing meant is if run with DEBUG flag on that case had never > behave as expected. > MCLK and LRCLK both is correctly outputted. While the current > unpatched version will generate > wrong BCLK complete break the codec. As such I proposed the BCLK patch. > I had not investigate deep why it never calls but the "int div" is > loaded and computed by where is a bit puzzling. > And the loaded it simply with div on actual mclk/2/bit_per_channel is > also incorrect. > As mentioned in previous explanations, the clock register is a fix > table on dividing # that is a LUT with restricted # allowed. Yeah the existing code expects the machine driver to call snd_soc_dai_set_clkdiv. I am guessing you are using something like simple card that doesn't do this. To be clear the bulk of your patch is good, updating this in hw_params is probably more normal these days. But we need to make sure the two paths don't interfere with each other. Think of a system that is already calling snd_soc_dai_set_clkdiv() to set BCLKDIV, after your patch BCLKDIV will be set twice potentially to two different values and would generate no error messages. I think you have two options: 1) Remove WM8978_BCLKDIV from wm8978_set_dai_clkdiv. There are no upstream users that I can see, so this should be fine. This would mean an out of tree user of snd_soc_dai_set_clkdiv would now get an error so they know they need to fix something. 2) Only run your dynamic BCLK code if wm8978_set_dai_clkdiv hasn't been called. This would mean any out of tree users of snd_soc_dai_set_clkdiv would have no problems everything would keep working as before, but at the cost of a little complexity in the code. I am happy with either approach so which ever you prefer is fine with me. Thanks, Charles