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[73.183.52.120]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-87c0120cc36sm47970366d6.2.2025.10.16.13.52.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Oct 2025 13:52:32 -0700 (PDT) Date: Thu, 16 Oct 2025 16:52:30 -0400 From: Brian Masney To: Nicolas Frattaroli Cc: AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd , Dong Aisheng , Matthias Brugger , Yassine Oudjana , Laura Nao , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Chia-I Wu , Chen-Yu Tsai , kernel@collabora.com, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc Message-ID: References: <20251010-mtk-pll-rpm-v3-0-fb1bd15d734a@collabora.com> <20251010-mtk-pll-rpm-v3-1-fb1bd15d734a@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251010-mtk-pll-rpm-v3-1-fb1bd15d734a@collabora.com> User-Agent: Mutt/2.2.14 (2025-02-20) Hi Nicolas, On Fri, Oct 10, 2025 at 10:47:09PM +0200, Nicolas Frattaroli wrote: > When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock > operations, such as setting the rate or switching parents. However, > another operation that can and often does touch actual hardware state is > recalc_rate, which may also be affected by such a dependency. > > Add parent enables/disables where the recalc_rate op is called directly. > > Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)") > Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)") > Reviewed-by: AngeloGioacchino Del Regno > Reviewed-by: Chen-Yu Tsai > Signed-off-by: Nicolas Frattaroli > --- > drivers/clk/clk.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c > index 85d2f2481acf360f0618a4a382fb51250e9c2fc4..1b0f9d567f48e003497afc98df0c0d2ad244eb90 100644 > --- a/drivers/clk/clk.c > +++ b/drivers/clk/clk.c > @@ -1921,7 +1921,14 @@ static unsigned long clk_recalc(struct clk_core *core, > unsigned long rate = parent_rate; > > if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) { > + if (core->flags & CLK_OPS_PARENT_ENABLE) > + clk_core_prepare_enable(core->parent); > + > rate = core->ops->recalc_rate(core->hw, parent_rate); > + > + if (core->flags & CLK_OPS_PARENT_ENABLE) > + clk_core_disable_unprepare(core->parent); > + > clk_pm_runtime_put(core); > } > return rate; clk_change_rate() has the following code: if (core->flags & CLK_OPS_PARENT_ENABLE) clk_core_prepare_enable(parent); ... core->rate = clk_recalc(core, best_parent_rate); ... if (core->flags & CLK_OPS_PARENT_ENABLE) clk_core_disable_unprepare(parent); clk_change_rate() ultimately is called by various clk_set_rate functions. Will that be a problem for the double calls to clk_core_prepare_enable()? Fanning this out to the edge further is going to make the code even more complicated. What do you think about moving this to clk_core_enable_lock()? I know the set_parent operation has a special case that would need to be worked around. Brian