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Fri, 17 Oct 2025 14:11:36 -0700 Date: Fri, 17 Oct 2025 14:11:34 -0700 From: Nicolin Chen To: kernel test robot CC: , , , , , , , , , , , , , Subject: Re: [PATCH v3 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs when attaching masters Message-ID: References: <14d76eebae359825442a96c0ffa13687de792063.1760555863.git.nicolinc@nvidia.com> <202510172340.XyneWIPI-lkp@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <202510172340.XyneWIPI-lkp@intel.com> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F1:EE_|PH7PR12MB8793:EE_ X-MS-Office365-Filtering-Correlation-Id: 5deafb60-5e7b-4ca6-625c-08de0dc1c6ef X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|82310400026|1800799024|36860700013; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2025 21:11:44.9634 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5deafb60-5e7b-4ca6-625c-08de0dc1c6ef X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8793 On Sat, Oct 18, 2025 at 12:03:27AM +0800, kernel test robot wrote: > sparse warnings: (new ones prefixed by >>) > >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c:3208:33: sparse: sparse: incorrect type in assignment (different address spaces) @@ expected struct arm_smmu_invs **invs_ptr @@ got struct arm_smmu_invs [noderef] __rcu ** @@ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c:3208:33: sparse: expected struct arm_smmu_invs **invs_ptr > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c:3208:33: sparse: got struct arm_smmu_invs [noderef] __rcu ** ... > > 3208 invst->invs_ptr = &new_smmu_domain->invs; ... > > 3247 rcu_assign_pointer(*invst->invs_ptr, invst->new_invs); Looks like we need: diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 8906c1625f428..398d8beb8f862 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -1105,7 +1105,7 @@ static inline bool arm_smmu_master_canwbs(struct arm_smmu_master *master) * to_unref argument to an arm_smmu_invs_unref() call */ struct arm_smmu_inv_state { - struct arm_smmu_invs **invs_ptr; + struct arm_smmu_invs __rcu **invs_ptr; struct arm_smmu_invs *old_invs; struct arm_smmu_invs *new_invs; }; Will fix in v4. Thanks Nicolin