From: Yury Norov <yury.norov@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Gabriele Monaco <gmonaco@redhat.com>,
Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
Michael Jeanson <mjeanson@efficios.com>,
Jens Axboe <axboe@kernel.dk>,
"Paul E. McKenney" <paulmck@kernel.org>,
"Gautham R. Shenoy" <gautham.shenoy@amd.com>,
Florian Weimer <fweimer@redhat.com>,
Tim Chen <tim.c.chen@intel.com>
Subject: Re: [patch V2 10/20] sched/mmcid: Convert mm CID mask to a bitmap
Date: Thu, 23 Oct 2025 12:46:50 -0400 [thread overview]
Message-ID: <aPpb-lAkNACezbkh@yury> (raw)
In-Reply-To: <20251022110556.029862568@linutronix.de>
On Wed, Oct 22, 2025 at 02:55:32PM +0200, Thomas Gleixner wrote:
> This is truly a bitmap and just conveniently uses a cpumask because the
> maximum size of the bitmap is nr_cpu_ids.
>
> But that prevents to do searches for a zero bit in a limited range, which
> is helpful to provide an efficient mechanism to consolidate the CID space
> when the number of users decreases.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
> ---
> include/linux/mm_types.h | 6 +++---
> kernel/sched/core.c | 2 +-
> kernel/sched/sched.h | 6 +++---
> 3 files changed, 7 insertions(+), 7 deletions(-)
>
> --- a/include/linux/mm_types.h
> +++ b/include/linux/mm_types.h
> @@ -1342,13 +1342,13 @@ static inline cpumask_t *mm_cpus_allowed
> }
>
> /* Accessor for struct mm_struct's cidmask. */
> -static inline cpumask_t *mm_cidmask(struct mm_struct *mm)
> +static inline unsigned long *mm_cidmask(struct mm_struct *mm)
> {
> unsigned long cid_bitmap = (unsigned long)mm_cpus_allowed(mm);
>
> /* Skip mm_cpus_allowed */
> cid_bitmap += cpumask_size();
> - return (struct cpumask *)cid_bitmap;
> + return (unsigned long *)cid_bitmap;
> }
>
> static inline void mm_init_cid(struct mm_struct *mm, struct task_struct *p)
> @@ -1363,7 +1363,7 @@ static inline void mm_init_cid(struct mm
> mm->mm_cid.nr_cpus_allowed = p->nr_cpus_allowed;
> raw_spin_lock_init(&mm->mm_cid.lock);
> cpumask_copy(mm_cpus_allowed(mm), &p->cpus_mask);
> - cpumask_clear(mm_cidmask(mm));
> + bitmap_zero(mm_cidmask(mm), cpumask_size());
> }
>
> static inline int mm_alloc_cid_noprof(struct mm_struct *mm, struct task_struct *p)
> --- a/kernel/sched/core.c
> +++ b/kernel/sched/core.c
> @@ -10399,7 +10399,7 @@ void sched_mm_cid_exit_signals(struct ta
> guard(preempt)();
> t->mm_cid.active = 0;
> if (t->mm_cid.cid != MM_CID_UNSET) {
> - cpumask_clear_cpu(t->mm_cid.cid, mm_cidmask(mm));
> + clear_bit(t->mm_cid.cid, mm_cidmask(mm));
> t->mm_cid.cid = MM_CID_UNSET;
> }
> }
> --- a/kernel/sched/sched.h
> +++ b/kernel/sched/sched.h
> @@ -3558,7 +3558,7 @@ static inline bool __mm_cid_get(struct t
>
> if (cid >= max_cids)
> return false;
> - if (cpumask_test_and_set_cpu(cid, mm_cidmask(mm)))
> + if (test_and_set_bit(cid, mm_cidmask(mm)))
> return false;
> t->mm_cid.cid = t->mm_cid.last_cid = cid;
> __this_cpu_write(mm->mm_cid.pcpu->cid, cid);
> @@ -3581,7 +3581,7 @@ static inline bool mm_cid_get(struct tas
> return true;
>
> /* Try the first zero bit in the cidmask. */
> - return __mm_cid_get(t, cpumask_first_zero(mm_cidmask(mm)), max_cids);
> + return __mm_cid_get(t, find_first_zero_bit(mm_cidmask(mm), num_possible_cpus()), max_cids);
> }
>
> static inline void mm_cid_select(struct task_struct *t)
> @@ -3602,7 +3602,7 @@ static inline void switch_mm_cid(struct
> {
> if (prev->mm_cid.active) {
> if (prev->mm_cid.cid != MM_CID_UNSET)
> - cpumask_clear_cpu(prev->mm_cid.cid, mm_cidmask(prev->mm));
> + clear_bit(prev->mm_cid.cid, mm_cidmask(prev->mm));
> prev->mm_cid.cid = MM_CID_UNSET;
> }
>
next prev parent reply other threads:[~2025-10-23 16:47 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 12:55 [patch V2 00/20] sched: Rewrite MM CID management Thomas Gleixner
2025-10-22 12:55 ` [patch V2 01/20] sched/mmcid: Revert the complex " Thomas Gleixner
2025-10-22 12:55 ` [patch V2 02/20] sched/mmcid: Use proper data structures Thomas Gleixner
2025-10-22 12:55 ` [patch V2 03/20] sched/mmcid: Cacheline align MM CID storage Thomas Gleixner
2025-10-22 12:55 ` [patch V2 04/20] sched: Fixup whitespace damage Thomas Gleixner
2025-10-22 12:55 ` [patch V2 05/20] sched/mmcid: Move scheduler code out of global header Thomas Gleixner
2025-10-22 12:55 ` [patch V2 06/20] sched/mmcid: Prevent pointless work in mm_update_cpus_allowed() Thomas Gleixner
2025-10-22 12:55 ` [patch V2 07/20] cpumask: Introduce cpumask_or_and_calc_weight() Thomas Gleixner
2025-10-23 16:37 ` Yury Norov
2025-10-22 12:55 ` [patch V2 08/20] sched/mmcid: Use cpumask_or_and_calc_weight() Thomas Gleixner
2025-10-23 16:45 ` Yury Norov
2025-10-22 12:55 ` [patch V2 09/20] cpumask: Cache num_possible_cpus() Thomas Gleixner
2025-10-23 16:25 ` Yury Norov
2025-10-22 12:55 ` [patch V2 10/20] sched/mmcid: Convert mm CID mask to a bitmap Thomas Gleixner
2025-10-23 16:46 ` Yury Norov [this message]
2025-10-27 5:45 ` Shrikanth Hegde
2025-10-27 8:57 ` Thomas Gleixner
2025-10-22 12:55 ` [patch V2 11/20] signal: Move MMCID exit out of sighand lock Thomas Gleixner
2025-10-22 12:55 ` [patch V2 12/20] sched/mmcid: Move initialization out of line Thomas Gleixner
2025-10-22 12:55 ` [patch V2 13/20] sched/mmcid: Provide precomputed maximal value Thomas Gleixner
2025-10-22 12:55 ` [patch V2 14/20] sched/mmcid: Serialize sched_mm_cid_fork()/exit() with a mutex Thomas Gleixner
2025-10-22 12:55 ` [patch V2 15/20] sched/mmcid: Introduce per task/CPU ownership infrastrcuture Thomas Gleixner
2025-10-22 12:55 ` [patch V2 16/20] sched/mmcid: Provide new scheduler CID mechanism Thomas Gleixner
2025-10-27 5:11 ` Shrikanth Hegde
2025-10-27 8:54 ` Thomas Gleixner
2025-10-22 12:55 ` [patch V2 17/20] sched/mmcid: Provide CID ownership mode fixup functions Thomas Gleixner
2025-10-22 12:55 ` [patch V2 18/20] irqwork: Move data struct to a types header Thomas Gleixner
2025-10-22 12:55 ` [patch V2 19/20] sched/mmcid: Implement deferred mode change Thomas Gleixner
2025-10-22 12:55 ` [patch V2 20/20] sched/mmcid: Switch over to the new mechanism Thomas Gleixner
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