Re: [PATCH v5 13/14] iommu/amd: Refactor logic to program the host page table in DTE

[Nicolin Chen <nicolinc@nvidia.com>]

On Wed, Nov 12, 2025 at 06:25:05PM +0000, Suravee Suthikulpanit wrote:
>  static void set_dte_entry(struct amd_iommu *iommu,
> @@ -2074,8 +2094,6 @@ static void set_dte_entry(struct amd_iommu *iommu,
>  	struct dev_table_entry *dte = &get_dev_table(iommu)[dev_data->devid];
>  	struct pt_iommu_amdv1_hw_info pt_info;
>  
> -	amd_iommu_make_clear_dte(dev_data, &new);
> -
>  	if (gcr3_info && gcr3_info->gcr3_tbl)
>  		domid = dev_data->gcr3_info.domid;

set_dte_gcr3_table() now always get the domid from this link, so
it's unnecessary.

>  	else {
> @@ -2097,35 +2115,29 @@ static void set_dte_entry(struct amd_iommu *iommu,
>  						       &pt_info);
>  			}
>  
> -			new.data[0] |= __sme_set(pt_info.host_pt_root) |
> -				       (pt_info.mode & DEV_ENTRY_MODE_MASK)
> -					       << DEV_ENTRY_MODE_SHIFT;
> +			pt_info.host_pt_root = __sme_set(pt_info.host_pt_root);
>  		}
>  	}

And this __IOMMU_DOMAIN_PAGING path seems to be used by v1 only.
So, it could be squashed into amd_iommu_set_dte_v1(). This could
tidy set_dte_entry() further.

>  
> -	new.data[0] |= DTE_FLAG_IR | DTE_FLAG_IW;
> -
>  	/*
>  	 * When SNP is enabled, we can only support TV=1 with non-zero domain ID.
>  	 * This is prevented by the SNP-enable and IOMMU_DOMAIN_IDENTITY check in
>  	 * do_iommu_domain_alloc().
>  	 */
>  	WARN_ON(amd_iommu_snp_en && (domid == 0));

This, if it's very necessary, can go into individual functions.

Though I am not sure if it is accurate as it seems to imply that
IOMMU_DOMAIN_IDENTITY has domid == 0?

But an IOMMU_DOMAIN_IDENTITY does:
	identity_domain.id = amd_iommu_pdom_id_alloc();
doing:
	ida_alloc_range(&pdom_ids, 1, MAX_DOMAIN_ID - 1, GFP_ATOMIC);
which means it never returns 0.

Nicolin