From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC0DD311C1F for ; Mon, 24 Nov 2025 15:10:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763997052; cv=none; b=FQ4S2jjQqUd8cxPgai1AaheuA+1W2kOEoQ68qTES/YTLhY4yKh2QRqSTcRb82iZQU3e5JDPuAwtZcl3iMtyuo6GWzN2B1u8Nr4NdmmOTrBr6W+pAJUpku+uFLuz+Da+M4rf96ODkQmDs/Ell4RAUGMKvl9h5t5ldHR1qda7sesY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763997052; c=relaxed/simple; bh=MDUGAVH9GkmUH/2cOnfyRGxhN7agAX2fjFQ3bVjAqyM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ZzVz+YAQsrWMEEg9GvFICnC9oJaimH3p6kJ5aVAJAJ4tpWD+6CR2Js+oPKN0lnTxjwBl2eywCiqVcaHulu3DUrq9nbUEqihL6UM6LzcbWNGMKVr9a+Sn1fdhHHTCJUAfNapHoiurNISG4VG2/izPly7O2Q1gDcKAQNgZRYXMVL4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=H6ckztJp; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="H6ckztJp" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1763997051; x=1795533051; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=MDUGAVH9GkmUH/2cOnfyRGxhN7agAX2fjFQ3bVjAqyM=; b=H6ckztJpMxbPP902e/y0HbdLMkR7e+x6S8NsTXmeU8odedjsUVV7kyK5 PXoiYuxUnYEC/MUIKRxFOhECaq5npW04FuQJ3193DDwId8Jhh9HNpHN69 okkxZVLjLFAahCm3Tmp69wyPoovkD1l9NjpcIilv+RHxPgSVmz76zXWm5 rRmc5dcYGJaKeL47Jsn5VLMTv78gYZFCbbjdRjda2xELdJCyGbPpmE0Ge Mbw1ooiRrZ3mc+3jb+qhw6nh5MLdUWlLVMPOFqQo3hXNVALiBb5hp6UE+ rnNI2g90pgt271eULycn8LPHC4hy62AiG8j+6xXoJMDgzs+ajB5A8Mran g==; X-CSE-ConnectionGUID: cKIaFWHxQTGG/tdFUT4eUQ== X-CSE-MsgGUID: UJThTWpiS1uWp313GIcxJw== X-IronPort-AV: E=McAfee;i="6800,10657,11623"; a="65947064" X-IronPort-AV: E=Sophos;i="6.20,223,1758610800"; d="scan'208";a="65947064" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2025 07:10:50 -0800 X-CSE-ConnectionGUID: 3hOsrAk3TraGObfKJnMBtA== X-CSE-MsgGUID: 0Pe3/K5cTm2Pa6Wy574vqQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,223,1758610800"; d="scan'208";a="193145960" Received: from egrumbac-mobl6.ger.corp.intel.com (HELO localhost) ([10.245.244.5]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2025 07:10:47 -0800 Date: Mon, 24 Nov 2025 17:10:44 +0200 From: Andy Shevchenko To: Christophe Leroy Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Michael Ellerman , Nicholas Piggin , Naveen N Rao , Madhavan Srinivasan , Bartosz Golaszewski Subject: Re: [PATCH v2 1/1] powerpc/8xx: Drop legacy-of-mm-gpiochip.h header Message-ID: References: <20241118123254.620519-1-andriy.shevchenko@linux.intel.com> <52be7ae1-34f7-49ef-80b0-0eb6577205ff@csgroup.eu> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Wed, Aug 20, 2025 at 05:10:21PM +0300, Andy Shevchenko wrote: > On Thu, Aug 14, 2025 at 10:33:52AM +0200, Christophe Leroy wrote: > > Le 18/11/2024 à 13:31, Andy Shevchenko a écrit : > > > Remove legacy-of-mm-gpiochip.h header file. The above mentioned > > > file provides an OF API that's deprecated. There is no agnostic > > > alternatives to it and we have to open code the logic which was > > > hidden behind of_mm_gpiochip_add_data(). Note, most of the GPIO > > > drivers are using their own labeling schemas and resource retrieval > > > that only a few may gain of the code deduplication, so whenever > > > alternative is appear we can move drivers again to use that one. > > > > > > As a side effect this change fixes a potential memory leak on > > > an error path, if of_mm_gpiochip_add_data() fails. > > > > Is there a reason for having done this change in cpm1_gpiochip_add16() and > > cpm1_gpiochip_add32() [arch/powerpc/platform/8xx/cpm1.c] and not in > > cpm2_gpiochip_add32() [arch/powerpc/sysdev/cpm_common.c] while all three > > functions are called from cpm_gpio_probe() [arch/powerpc/sysdev/cpm_gpio.c] > > ? > > No specific reason, just lack of time to have got all of the cases. I have noticed that you cleaned all them up, I appreciate the work, thanks! -- With Best Regards, Andy Shevchenko