From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC9A12ED16B for ; Mon, 24 Nov 2025 21:06:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764018369; cv=none; b=Q57wInCMKo0y4IYQLsqjlLvUZApv7KBhRu0zyoQq0qxcdZ7r62aK6vhzV3bpLoV6xoCLVcH1Gm6dE98aoN14Yc2XyfCjRaYdqW6GCIH9VmlpeUSHmd2Jua2stawQA4ytEUJFNKpqLAW2+rvL5ctjzmH8GZxM9yiXVPFRskfTK+8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764018369; c=relaxed/simple; bh=bnsZ/57wYh6tRMk1uFAzn7dFdL8isX7dHZO/V6LngHg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=F3TURrucjSMmYUBJNEjShxfNwtA+EY00qUFvwM0OYMShIGgqF1TYEW785fwGJ7HKULuP5/LWk9isoiTIPMr7+rx1/4xnmTsZLsBe9T/amjsel3wDv/IPt5S7WtUqku2xhEaXHJLFy6H+3pRMpuUERRjwudKfobs9BAO4z00ShEE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JK8k6UCv; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JK8k6UCv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764018363; x=1795554363; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=bnsZ/57wYh6tRMk1uFAzn7dFdL8isX7dHZO/V6LngHg=; b=JK8k6UCvNNRb922RoN+h8GtyxXzP8wabbVgDJ/lLQ3lytxMZL7TK6Ha9 wpx+M74q0aV/5CWwh5dL+KXQcWCgQwRB4jsxAm/y4GPf6ttVlzqKMZu3K wkI/IydB7Z7Jyhk1xSD9sweyHSiaUvDTYlrzF5TPo/w0sUOWLZj1dfWr3 HpHjsaVGri+j34c7epxbwCJpUdyVruEOe21zZxFSk2JGkBhCUq1hravkj Isnz83Xeuvk8SdO428MQ1aOFb+6zs13bONordBrkQPr6aLz/gCKjWvLLP M22iPydStOxTVfoQiAW/p1O1WSgfZP2RLBpyqmTUJ/kNllqKklMJKmd4s A==; X-CSE-ConnectionGUID: ihnQBNnTQGGbK1vk1IH40A== X-CSE-MsgGUID: xHbLnRVRSee9S82Nxr4QMg== X-IronPort-AV: E=McAfee;i="6800,10657,11623"; a="88681012" X-IronPort-AV: E=Sophos;i="6.20,223,1758610800"; d="scan'208";a="88681012" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2025 13:06:00 -0800 X-CSE-ConnectionGUID: OdFwTplZQm2jhQClKJ5ZFg== X-CSE-MsgGUID: NSObI5SPSb6kJssMCAJeTg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,223,1758610800"; d="scan'208";a="196731627" Received: from dnelso2-mobl.amr.corp.intel.com (HELO localhost) ([10.124.222.165]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2025 13:05:56 -0800 Date: Mon, 24 Nov 2025 23:05:53 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: zhangzhijie Cc: jani.nikula@linux.intel.com, jeff@jeffgeerling.com, wangran@bosc.ac.cn, zhangjian@bosc.ac.cn, daniel@ffwll.ch, rodrigo.vivi@intel.com, joonas.lahtinen@linux.intel.com, tursulin@ursulin.net, airlied@gmail.com, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] i915: Support Intel GPU porting on any non-x86 system. Message-ID: References: <20251124065612.1920389-1-zhangzhijie@bosc.ac.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20251124065612.1920389-1-zhangzhijie@bosc.ac.cn> X-Patchwork-Hint: comment Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Mon, Nov 24, 2025 at 02:56:12PM +0800, zhangzhijie wrote: > inb/outb speccial wire not support on other ARCH. > Should detect whether arch platform support or not. > > Signed-off-by: zhangzhijie > --- > drivers/gpu/drm/i915/display/intel_vga.c | 27 ++++++++++++++++++------ > 1 file changed, 20 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index 6e125564db34..d5d6c4ba6434 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -41,6 +41,15 @@ static bool has_vga_pipe_sel(struct intel_display *display) > return DISPLAY_VER(display) < 7; > } > > +static bool intel_arch_support_vga_pm(struct intel_display *display) whatis "pm"? > +{ > +#if defined(CONFIG_X86) || defined(CONFIG_X86_64) > + return true; > +#else > + return false; > +#endif Isn't there already some kind of ARCH_HAS_PORTIO thing? Does that not work? > +} > + > /* Disable the VGA plane that we never use */ > void intel_vga_disable(struct intel_display *display) > { > @@ -66,11 +75,13 @@ void intel_vga_disable(struct intel_display *display) > I wouldn't expect us to get this far. The VGA plane should never have been enabled in the first place. > /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ > vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); Why are you leaving the vga_get() outside the check? > - outb(0x01, VGA_SEQ_I); > - sr1 = inb(VGA_SEQ_D); > - outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); > - vga_put(pdev, VGA_RSRC_LEGACY_IO); > - udelay(300); > + if (likely(intel_arch_support_vga_pm(display))) { > + outb(0x01, VGA_SEQ_I); > + sr1 = inb(VGA_SEQ_D); > + outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); > + vga_put(pdev, VGA_RSRC_LEGACY_IO); > + udelay(300); > + } > > intel_de_write(display, vga_reg, VGA_DISP_DISABLE); > intel_de_posting_read(display, vga_reg); > @@ -91,8 +102,10 @@ void intel_vga_reset_io_mem(struct intel_display *display) > * and error messages. > */ > vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > - outb(inb(VGA_MIS_R), VGA_MIS_W); > - vga_put(pdev, VGA_RSRC_LEGACY_IO); > + if (likely(intel_arch_support_vga_pm(display))) { > + outb(inb(VGA_MIS_R), VGA_MIS_W); > + vga_put(pdev, VGA_RSRC_LEGACY_IO); > + } > } > > int intel_vga_register(struct intel_display *display) > -- > 2.34.1 -- Ville Syrjälä Intel