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AJvYcCUuXHYnngdp/ogwJGOF4LOKpyUONStcIkXIlwj3Q7k6mfM7bBKFsG/tNSS2vAhobaS3zFRP4I2mtxliO7o=@vger.kernel.org X-Gm-Message-State: AOJu0Yzqty+PlVFQz21nDcWyGK/+Fh7Oy8XtTObI3tp3WLo4A8jEkbTr inDD/sIpqQ4hQucaRNUWHzT/bMNFNMU7mx/ATa6uvrheTmvl9ZBxfBQ18C2r/mhpznimmawbG9h GX8Lh5Q== X-Google-Smtp-Source: AGHT+IETpqfOMbQHciADtekePteXvnv9DlqX36J6TK/HCkOjyABlfnd9wiI8RuLemzKsnOn3SU1gXUo19c0= X-Received: from pjnm17.prod.google.com ([2002:a17:90a:8591:b0:340:53bc:56cb]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:3bcc:b0:343:7714:4caa with SMTP id 98e67ed59e1d1-3475ebe7401mr2637894a91.3.1764082463841; Tue, 25 Nov 2025 06:54:23 -0800 (PST) Date: Tue, 25 Nov 2025 06:54:22 -0800 In-Reply-To: <718b02d4cfa56a65cb2383a0e57ca988defc036b.camel@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251107093239.67012-1-amit@kernel.org> <20251107093239.67012-2-amit@kernel.org> <4102ede9-4bf7-4c0a-a303-5ed4d9cca762@citrix.com> <718b02d4cfa56a65cb2383a0e57ca988defc036b.camel@amd.com> Message-ID: Subject: Re: [PATCH v6 1/1] x86: kvm: svm: set up ERAPS support for guests From: Sean Christopherson To: Amit Shah Cc: "andrew.cooper3@citrix.com" , "corbet@lwn.net" , "pawan.kumar.gupta@linux.intel.com" , "kai.huang@intel.com" , "jpoimboe@kernel.org" , "dave.hansen@linux.intel.com" , "daniel.sneddon@linux.intel.com" , Thomas Lendacky , "kvm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "mingo@redhat.com" , "dwmw@amazon.co.uk" , "pbonzini@redhat.com" , "tglx@linutronix.de" , Babu Moger , Sandipan Das1 , "linux-doc@vger.kernel.org" , "hpa@zytor.com" , "peterz@infradead.org" , "bp@alien8.de" , "boris.ostrovsky@oracle.com" , David Kaplan , "x86@kernel.org" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Tue, Nov 25, 2025, Amit Shah wrote: > On Mon, 2025-11-24 at 16:40 +0000, Andrew Cooper wrote: > > > > So punting on emulating RAP clearing because it's too hard is not > > > > an option.=C2=A0 And AFAICT, it's not even that hard. > > > I didn't mean on punting it in the "it's too hard" sense, but in the > > > sense that we don't know all the details of when hardware decides to = do a > > > flush; and even if triggers are mentioned in this APM today, future > > > changes to microcode or APM docs might reveal more triggers that we n= eed > > > to emulate and account for.=C2=A0 There's no way to track such change= s, so my > > > thinking is that we should be conservative and not assume anything. > >=20 > > But this *is* the problem.=C2=A0 The APM says that OSes can depend on t= his > > property for safety, and does not provide enough information for > > Hypervisors to make it safe. >=20 > That's certainly true - that's driving my reluctance to perform the > emulation or in enabling it for cases that aren't completely clear. Uh, I think you're misunderstanding what Andrew and I are saying. Doing no= thing is the worst option. > > ERAPS is a bad spec.=C2=A0 It should not have gotten out of the door. > >=20 > > A better spec would say "clears the RAP on any MOV to CR3" and > > nothing else. > >=20 > > The fact that it might happen microarchitecturally in other cases doesn= 't > > matter; what matters is what OSes can architecturally depend on, and ri= ght > > now that that explicitly includes "unspecified cases in NDA documents". >=20 > To be honest, I haven't seen the mention of those unspecified cases or > NDA documents. >=20 > However, at least for the case of an NPT guest, the hypervisor does not > need to do anything special (other than handle nested guests as this > patch does). How on earth do you come to that conclusion? I'm genuinely baffled as to w= hy you think it's safe to completely ignore RAP clears that are architecturall= y supposed to happen from the guest's perspective.=20