[PATCH v4 19/22] arm64: dts: renesas: r9a09g057: Add USB2.0 PHY VBUS internal regulator node

Tommaso Merciai
2025-11-21T15:15:36Z

USB2.0 PHY of the RZ/V2H(P) SoC can drive VBUS line via the VBOUT bit of
the VBCTRL register.

Add VBUS regulator nodes (usb2_phy0_vbus_otg) under the usb2_phy0
nodes to describe this hw functionality.

This enables proper management of VBUS for USB2.0 OTG devices and ensures
compliance with hardware requirements.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
---
v3->v4:
- No changes

v2->v3:
- No changes

v1->v2:
- No changes

arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index b4bbcde33099..9dc0fcaad86f 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -1036,6 +1036,11 @@ usb2_phy0: usb-phy@15800200 {
power-domains = <&cpg>;
mux-states = <&usb20phyrst 1>;
status = "disabled";
+
+ usb2_phy0_vbus_otg: vbus-regulator {
+ regulator-name = "USB2PHY0-VBUS-OTG";
+ status = "disabled";
+ };
};

usb2_phy1: usb-phy@15810200 {
--
2.43.0