From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D1BB1344035 for ; Wed, 26 Nov 2025 17:42:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764178937; cv=none; b=p9B2vCgUtBOc+cuPYt5Dd4ChuB5pe4HFxY+HMJARAxzwswYrffp4cMqG+6uQ7RAFq+JAtCIAoHFPJ2kzVJfHBE5V+T04gYDSteo2M1ktj3HLQ5Kpp7ssKlAlyZMVimpTL8fTg21O2JScuhO39XOW3ZjZ0XulrIQNbA5TJ5sYezo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764178937; c=relaxed/simple; bh=2s+iqgIEKlD8WhIs5NPasArUjQo514w0kihrgG92qNo=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=PeAS30x7KR5dwObH3qZGcC49Wwcv+x6sbzFUf0nRyQzlYbBkjmyJfnvqDaXMFqiwATW5Tl5xhd4jUkvaAFxzgsuuHY9D/6FFMyk5K/JHvVYa31m8mBNxbq1H7vL4/e3CLZcHLSV2J5jpha7MRh72HllQZs0oL4/VBsUt6H409bM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=n0X0+cbj; arc=none smtp.client-ip=192.198.163.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="n0X0+cbj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764178935; x=1795714935; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=2s+iqgIEKlD8WhIs5NPasArUjQo514w0kihrgG92qNo=; b=n0X0+cbjt00aDdaVgDa7thWb5c10LPjcaKkAtL19REDYwlMxkWO6geYu zjyRjsEElL4BYg8WLdutEUGOP8nGhn3UKIvfkG2qKnRlbQkpVmE9yl+ZM n8ieZUYhBFuizcBs7XbFiFzzZo49tJRNZ/Kf8sN5e1f58/CVVBaS1M/eU aZVRxjMW+hVdI9uDjsK1EKPpz5hWUktCJVqlHAcqoYhFveykq4JntoCjJ FwggaaMJcWbv4NvioPAGb7JNOk0Vx1oyqN8sGedQpQSMwxLMgKGPcmTET UXukC8z4bL4dPbNuOLpr+gsX8qNeLrlUWCcOeKe2MLERHUVbGq1L6vnG0 w==; X-CSE-ConnectionGUID: dpdtFu+tSPyai/WNxcu4ow== X-CSE-MsgGUID: ijZakYAEQlmhVJggCo6svQ== X-IronPort-AV: E=McAfee;i="6800,10657,11625"; a="66263855" X-IronPort-AV: E=Sophos;i="6.20,228,1758610800"; d="scan'208";a="66263855" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Nov 2025 09:42:14 -0800 X-CSE-ConnectionGUID: XPUFpdbvQOerw9YL44OLXw== X-CSE-MsgGUID: GNicKukGTw2j3A1a2MKbPA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,228,1758610800"; d="scan'208";a="192250877" Received: from rvuia-mobl.ger.corp.intel.com (HELO localhost) ([10.245.245.89]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Nov 2025 09:42:13 -0800 Date: Wed, 26 Nov 2025 19:42:10 +0200 From: Andy Shevchenko To: Guixin Liu Cc: Bjorn Helgaas , linux-kernel@vger.kernel.org Subject: Re: [PATCH v4] PCI: Check rom header and data structure addr before accessing Message-ID: References: <20251126125727.57620-1-kanie@linux.alibaba.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Wed, Nov 26, 2025 at 07:39:18PM +0200, Andy Shevchenko wrote: > On Wed, Nov 26, 2025 at 08:57:27PM +0800, Guixin Liu wrote: ... > > image = rom; > > do { > > void __iomem *pds; > > + > > + if (!pci_rom_header_valid(pdev, image, rom, size, true)) > > break; > > + > > /* get the PCI data structure and check its "PCIR" signature */ > > pds = image + readw(image + 24); > > + if (!pci_rom_data_struct_valid(pdev, pds, rom, size)) > > break; > > + > > + last_image = !!(readb(pds + 21) & 0x80); > > !!() is not needed. > > last_image = readb(pds + 21) & 0x80; And while at it, isn't this a bit field and last_image = readb(pds + 21) & BIT(7); is even more descriptive? Please, check with specification and if it's a (single) bit, also change this. > > length = readw(pds + 16); > > image += length * 512; > > + > > + if (!pci_rom_header_valid(pdev, image, rom, size, last_image)) > > break; > > } while (length && !last_image); -- With Best Regards, Andy Shevchenko