From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB18D2253AB for ; Mon, 15 Dec 2025 07:05:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765782352; cv=none; b=T9PHoKocJO086kK7xo70iZXSwOAHAMoEZ+OVH1FjnDn+AdjtBojBpWIOCPK9cM4hRcR2k8/UdzGOyV67xa8UKQaPuhE8FsbMohQwCO837/iAuC4w+JMTk5HtSY4aGNlAk+6ZtHZakyF498NOwiGc1X0uQ2Wh9yRaXU8ep5/xtSM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765782352; c=relaxed/simple; bh=P+3XV2gk3wgDouPzdQ0RzkZIkoffXNwyIZ+BFiokm1Q=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=HxsykdzKJieFyJZAATHlaHsCvcBeoRisuJ8b8RaG7vZIQpBQ6XrzuzYLknDuWSqD9Qp83qcLE7HLYnizTH6rN54FlPn4JxwkQ3iute8nBu1MZSoFaWhigrNKvMJUlzHfL8x7cgPuFYcuz/hCP82jUnIE8J72oVXMKFjF/0omv/Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WOIkMx4Y; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WOIkMx4Y" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 65F77C19421; Mon, 15 Dec 2025 07:05:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1765782352; bh=P+3XV2gk3wgDouPzdQ0RzkZIkoffXNwyIZ+BFiokm1Q=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=WOIkMx4YFKACHtOMpwLDHMCD9WtlzzLsUOLa83R/11/i5iuC0Vc6ALwp2pufdKV+3 LU24EsSvASgmATOveqqfbeJJKCnj6R845a1vk4XXgVWOywl+KTovL1Ua2EWr4Aysj9 xlJeAeuqC/txQ31M87V/MU+fXYVbAt3HsohJ3AB/qoETyUa9vmZXbqBRLH5atkHy3d +eJy/WnRznSw2yGJ4T4c83f5zpIBKuPZdE6ub75Pjh9+f9VQY3TTZ8rJEW7RXf+983 Ml3MkBrClFyv0mnMY34gzS3ad+oS7jPs9uomRIXWnAZ5Z+vvJAeLcyQ9FSfaasPjva XlYYg1s1LKt/w== Date: Mon, 15 Dec 2025 08:05:46 +0100 From: Ingo Molnar To: Uros Bizjak Cc: linux-kernel@vger.kernel.org, "Ahmed S . Darwish" , Andrew Cooper , Ard Biesheuvel , Arnd Bergmann , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , John Ogness , Linus Torvalds , Peter Zijlstra , Thomas Gleixner Subject: [PATCH 15/15 -v4] x86/percpu: Remove !CONFIG_X86_CX8 methods Message-ID: References: <20251214084710.3606385-1-mingo@kernel.org> <20251214084710.3606385-16-mingo@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: * Uros Bizjak wrote: > CC_SET() and CC_OUT() macros have been removed in the meantime [1], so > the last two lines should be changed to: > > : "=@ccz" (success), > > [1] https://lore.kernel.org/lkml/20250907183420.48569-1-ubizjak@gmail.com/ Indeed, -v4 patch attached. Thanks, Ingo =============> From: Uros Bizjak Date: Sun, 14 Dec 2025 09:40:31 +0100 Subject: [PATCH] x86/percpu: Remove !CONFIG_X86_CX8 methods Adjust the constraints to the non-alternatives asm() statement. Signed-off-by: Uros Bizjak Signed-off-by: Ingo Molnar Acked-by: Dave Hansen Cc: "Ahmed S . Darwish" Cc: Andrew Cooper Cc: Ard Biesheuvel Cc: Arnd Bergmann Cc: Borislav Petkov Cc: Dave Hansen Cc: "H . Peter Anvin" Cc: John Ogness Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: https://lore.kernel.org/r/15696bb3-126b-ef71-f838-80e1e1c1b0aa@gmail.com --- arch/x86/include/asm/percpu.h | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h index 725d0eff7acd..ee98abae8427 100644 --- a/arch/x86/include/asm/percpu.h +++ b/arch/x86/include/asm/percpu.h @@ -335,13 +335,10 @@ do { \ old__.var = _oval; \ new__.var = _nval; \ \ - asm_inline qual ( \ - ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \ - "cmpxchg8b " __percpu_arg([var]), X86_FEATURE_CX8) \ - : ALT_OUTPUT_SP([var] "+m" (__my_cpu_var(_var)), \ - "+a" (old__.low), "+d" (old__.high)) \ - : "b" (new__.low), "c" (new__.high), \ - "S" (&(_var)) \ + asm qual ("cmpxchg8b " __percpu_arg([var]) \ + : [var] "+m" (__my_cpu_var(_var)), \ + "+a" (old__.low), "+d" (old__.high) \ + : "b" (new__.low), "c" (new__.high) \ : "memory"); \ \ old__.var; \ @@ -364,14 +361,11 @@ do { \ old__.var = *_oval; \ new__.var = _nval; \ \ - asm_inline qual ( \ - ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \ - "cmpxchg8b " __percpu_arg([var]), X86_FEATURE_CX8) \ - : ALT_OUTPUT_SP("=@ccz" (success), \ - [var] "+m" (__my_cpu_var(_var)), \ - "+a" (old__.low), "+d" (old__.high)) \ - : "b" (new__.low), "c" (new__.high), \ - "S" (&(_var)) \ + asm qual ("cmpxchg8b " __percpu_arg([var]) \ + : "=@ccz" (success), \ + [var] "+m" (__my_cpu_var(_var)), \ + "+a" (old__.low), "+d" (old__.high) \ + : "b" (new__.low), "c" (new__.high) \ : "memory"); \ if (unlikely(!success)) \ *_oval = old__.var; \