Re: (subset) [PATCH v2 2/4] dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs

Lee Jones
2026-01-09T10:54:51Z

On Mon, 15 Dec 2025 17:41:52 +0300, Dan Carpenter wrote:
> The NXP S32 SoCs have a GPR region which is used by a variety of
> drivers. Some examples of the registers in this region are:
>
> * DDR_PMU_IRQ
> * GMAC0_PHY_INTF_SEL
> * GMAC1_PHY_INTF_SEL
> * PFE_EMACS_INTF_SEL
> * PFE_COH_EN
> * PFE_PWR_CTRL
> * PFE_EMACS_GENCTRL1
> * PFE_GENCTRL3
>
> [...]

Applied, thanks!

[2/4] dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs
commit: 441db0e922485befe0cfed2523e8e452a3b5f7cc

--
Lee Jones [李琼斯]