Re: [PATCH v2 2/4] dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs

Krzysztof Kozlowski
2025-12-17T08:35:46Z

On Mon, Dec 15, 2025 at 05:41:52PM +0300, Dan Carpenter wrote:
> The NXP S32 SoCs have a GPR region which is used by a variety of
> drivers. Some examples of the registers in this region are:
>
> * DDR_PMU_IRQ
> * GMAC0_PHY_INTF_SEL
> * GMAC1_PHY_INTF_SEL
> * PFE_EMACS_INTF_SEL
> * PFE_COH_EN
> * PFE_PWR_CTRL
> * PFE_EMACS_GENCTRL1
> * PFE_GENCTRL3
>
> Use the syscon interface to access these registers.
>
> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
> ---
> v2: Use nxp,s32g2-gpr and nxp,s32g3-gpr instead of nxp,s32g-gpr
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 4 ++++
> 1 file changed, 4 insertions(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof