From: Alison Schofield <alison.schofield@intel.com>
To: Robert Richter <rrichter@amd.com>
Cc: Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
"Davidlohr Bueso" <dave@stgolabs.net>,
<linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Joshua Hahn <joshua.hahnjy@gmail.com>
Subject: Re: [PATCH v8 12/13] cxl: Check if ULLONG_MAX was returned from translation functions
Date: Mon, 15 Dec 2025 21:26:52 -0800 [thread overview]
Message-ID: <aUDtnOIGKiHTEpEO@aschofie-mobl2.lan> (raw)
In-Reply-To: <20251209180659.208842-13-rrichter@amd.com>
On Tue, Dec 09, 2025 at 07:06:48PM +0100, Robert Richter wrote:
> The return address of translation functions is not consistently
> checked for a valid address. Check if ULLONG_MAX was returned.
The why of the dpa base address change is not explained as that
That -1 return would be ULLONG_MAX in 64 bit system, so not
clear why the return value of cxl_dpa_resource_start() needs to
change.
Is this is for general cleanup, then, like DaveJ noted, returning
sooner is better. I guess post this as a general cleanup pointing
out why the earlier returns are needed.
>
> Signed-off-by: Robert Richter <rrichter@amd.com>
> ---
> drivers/cxl/core/hdm.c | 2 +-
> drivers/cxl/core/region.c | 36 +++++++++++++++++++-------
> tools/testing/cxl/test/cxl_translate.c | 4 +--
> 3 files changed, 29 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 1c5d2022c87a..8b50cdce4b29 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -530,7 +530,7 @@ resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled)
>
> resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled)
> {
> - resource_size_t base = -1;
> + resource_size_t base = ULLONG_MAX;
>
> lockdep_assert_held(&cxl_rwsem.dpa);
> if (cxled->dpa_res)
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index c7ac78f1b644..2c070c7c7bfe 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -3124,7 +3124,7 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
> struct cxl_root_decoder *cxlrd = cxlr->cxlrd;
> struct cxl_region_params *p = &cxlr->params;
> struct cxl_endpoint_decoder *cxled = NULL;
> - u64 dpa_offset, hpa_offset, hpa;
> + u64 base, dpa_offset, hpa_offset, hpa;
> u16 eig = 0;
> u8 eiw = 0;
> int pos;
> @@ -3142,8 +3142,14 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
> ways_to_eiw(p->interleave_ways, &eiw);
> granularity_to_eig(p->interleave_granularity, &eig);
>
> - dpa_offset = dpa - cxl_dpa_resource_start(cxled);
> + base = cxl_dpa_resource_start(cxled);
> + if (base == ULLONG_MAX)
> + return ULLONG_MAX;
> +
> + dpa_offset = dpa - base;
> hpa_offset = cxl_calculate_hpa_offset(dpa_offset, pos, eiw, eig);
> + if (hpa_offset == ULLONG_MAX)
> + return ULLONG_MAX;
>
> /* Apply the hpa_offset to the region base address */
> hpa = hpa_offset + p->res->start + p->cache_size;
> @@ -3152,6 +3158,9 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
> if (cxlrd->ops.hpa_to_spa)
> hpa = cxlrd->ops.hpa_to_spa(cxlrd, hpa);
>
> + if (hpa == ULLONG_MAX)
> + return ULLONG_MAX;
> +
> if (!cxl_resource_contains_addr(p->res, hpa)) {
> dev_dbg(&cxlr->dev,
> "Addr trans fail: hpa 0x%llx not in region\n", hpa);
> @@ -3176,10 +3185,11 @@ static int region_offset_to_dpa_result(struct cxl_region *cxlr, u64 offset,
> struct cxl_region_params *p = &cxlr->params;
> struct cxl_root_decoder *cxlrd = cxlr->cxlrd;
> struct cxl_endpoint_decoder *cxled;
> - u64 hpa, hpa_offset, dpa_offset;
> + u64 hpa_offset = offset;
> + u64 dpa_base, dpa_offset;
> u16 eig = 0;
> u8 eiw = 0;
> - int pos;
> + int pos = -1;
>
> lockdep_assert_held(&cxl_rwsem.region);
> lockdep_assert_held(&cxl_rwsem.dpa);
> @@ -3193,13 +3203,14 @@ static int region_offset_to_dpa_result(struct cxl_region *cxlr, u64 offset,
> * CXL HPA is assumed to equal SPA.
> */
> if (cxlrd->ops.spa_to_hpa) {
> - hpa = cxlrd->ops.spa_to_hpa(cxlrd, p->res->start + offset);
> - hpa_offset = hpa - p->res->start;
> - } else {
> - hpa_offset = offset;
> + hpa_offset = cxlrd->ops.spa_to_hpa(cxlrd, p->res->start + offset);
> + if (hpa_offset != ULLONG_MAX)
> + hpa_offset -= p->res->start;
> }
>
> - pos = cxl_calculate_position(hpa_offset, eiw, eig);
> + if (hpa_offset != ULLONG_MAX)
> + pos = cxl_calculate_position(hpa_offset, eiw, eig);
> +
> if (pos < 0 || pos >= p->nr_targets) {
> dev_dbg(&cxlr->dev, "Invalid position %d for %d targets\n",
> pos, p->nr_targets);
> @@ -3213,8 +3224,13 @@ static int region_offset_to_dpa_result(struct cxl_region *cxlr, u64 offset,
> cxled = p->targets[i];
> if (cxled->pos != pos)
> continue;
> +
> + dpa_base = cxl_dpa_resource_start(cxled);
> + if (dpa_base == ULLONG_MAX)
> + continue;
> +
> result->cxlmd = cxled_to_memdev(cxled);
> - result->dpa = cxl_dpa_resource_start(cxled) + dpa_offset;
> + result->dpa = dpa_base + dpa_offset;
>
> return 0;
> }
> diff --git a/tools/testing/cxl/test/cxl_translate.c b/tools/testing/cxl/test/cxl_translate.c
> index 2200ae21795c..66f8270aacd8 100644
> --- a/tools/testing/cxl/test/cxl_translate.c
> +++ b/tools/testing/cxl/test/cxl_translate.c
> @@ -69,7 +69,7 @@ static u64 to_hpa(u64 dpa_offset, int pos, u8 r_eiw, u16 r_eig, u8 hb_ways,
> /* Calculate base HPA offset from DPA and position */
> hpa_offset = cxl_calculate_hpa_offset(dpa_offset, pos, r_eiw, r_eig);
>
> - if (math == XOR_MATH) {
> + if (hpa_offset != ULLONG_MAX && math == XOR_MATH) {
> cximsd->nr_maps = hbiw_to_nr_maps[hb_ways];
> if (cximsd->nr_maps)
> return cxl_do_xormap_calc(cximsd, hpa_offset, hb_ways);
> @@ -262,7 +262,7 @@ static int test_random_params(void)
> reverse_dpa = cxl_calculate_dpa_offset(hpa, eiw, eig);
> reverse_pos = cxl_calculate_position(hpa, eiw, eig);
>
> - if (reverse_dpa != dpa || reverse_pos != pos) {
> + if (hpa == ULLONG_MAX || reverse_dpa != dpa || reverse_pos != pos) {
> pr_err("test random iter %d FAIL hpa=%llu, dpa=%llu reverse_dpa=%llu, pos=%d reverse_pos=%d eiw=%u eig=%u\n",
> i, hpa, dpa, reverse_dpa, pos, reverse_pos, eiw,
> eig);
> --
> 2.47.3
>
next prev parent reply other threads:[~2025-12-16 5:27 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-09 18:06 [PATCH v8 00/13] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Robert Richter
2025-12-09 18:06 ` [PATCH v8 01/13] cxl/region: Rename misleading variable name @hpa to @hpa_range Robert Richter
2025-12-09 18:06 ` [PATCH v8 02/13] cxl/region: Store root decoder in struct cxl_region Robert Richter
2025-12-09 18:06 ` [PATCH v8 03/13] cxl/region: Store HPA range " Robert Richter
2025-12-09 18:06 ` [PATCH v8 04/13] cxl: Simplify cxl_root_ops allocation and handling Robert Richter
2025-12-09 18:06 ` [PATCH v8 05/13] cxl/region: Separate region parameter setup and region construction Robert Richter
2025-12-09 18:06 ` [PATCH v8 06/13] cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos() Robert Richter
2025-12-09 18:06 ` [PATCH v8 07/13] cxl/region: Use region data to get the root decoder Robert Richter
2025-12-09 18:06 ` [PATCH v8 08/13] cxl: Introduce callback for HPA address ranges translation Robert Richter
2025-12-09 18:06 ` [PATCH v8 09/13] cxl/acpi: Prepare use of EFI runtime services Robert Richter
2025-12-09 18:06 ` [PATCH v8 10/13] cxl: Enable AMD Zen5 address translation using ACPI PRMT Robert Richter
2025-12-09 18:06 ` [PATCH v8 11/13] cxl/atl: Lock decoders that need address translation Robert Richter
2025-12-09 18:06 ` [PATCH v8 12/13] cxl: Check if ULLONG_MAX was returned from translation functions Robert Richter
2025-12-10 16:23 ` Dave Jiang
2025-12-11 19:50 ` kernel test robot
2025-12-14 23:40 ` kernel test robot
2025-12-16 5:26 ` Alison Schofield [this message]
2025-12-09 18:06 ` [PATCH v8 13/13] cxl: Disable HPA/SPA translation handlers for Normalized addressing Robert Richter
2025-12-10 17:44 ` Dave Jiang
2025-12-15 13:25 ` Jonathan Cameron
2025-12-16 5:21 ` Alison Schofield
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