[PATCH v2 11/11] drm/panel: Add panel driver for Samsung ANA6707 DDIC

Marijn Suijten
2025-12-21T23:32:28Z

The ANA6707 Display-Driver-IC is paired with the amb650yl01 panel in the
Sony Xperia 1 III, Sony Xperia 1 IV and Sony Xperia V smartphones. It
uses Display Stream Compression 1.1 and requires dual DSI interfaces to
satisfy the bandwidth requirements to run at 1644x3840 at 120Hz.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
MAINTAINERS | 1 +
drivers/gpu/drm/panel/Kconfig | 16 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-samsung-ana6707.c | 461 ++++++++++++++++++++++++++
4 files changed, 479 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 148b1f66c98b..b29adf972dfc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8150,6 +8150,7 @@ DRM DRIVER FOR SAMSUNG ANA6707 DDIC
M: Marijn Suijten <marijn.suijten@somainline.org>
S: Maintained
F: Documentation/devicetree/bindings/display/panel/samsung,ana6707.yaml
+F: drivers/gpu/drm/panel/panel-samsung-ana6707.c

DRM DRIVER FOR SAMSUNG DB7430 PANELS
M: Linus Walleij <linusw@kernel.org>
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 3cca1c580d50..eda808b9d466 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -752,6 +752,22 @@ config DRM_PANEL_SAMSUNG_AMS639RQ08
Say Y or M here if you want to enable support for the
Samsung AMS639RQ08 FHD Plus (2340x1080@60Hz) CMD mode panel.

+config DRM_PANEL_SAMSUNG_ANA6707
+ tristate "Samsung ANA6707 DSI cmd mode panels"
+ depends on GPIOLIB
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ select DRM_DISPLAY_DSC_HELPER
+ select DRM_DISPLAY_HELPER
+ help
+ Say Y here if you want to enable support for the Samsung 4k 6.5" OLED dual-DSI
+ command mode amb650yl01 panel found in the Sony Xperia 1 III, Sony Xperia 1 IV
+ and Sony Xperia V smartphones.
+
+ This Display-IC uses Display Stream Compression 1.1 and features a 1644x3840
+ and 1096x2560 resolution which can both be driven at 60Hz and 120Hz.
+
config DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24
tristate "Samsung AMS427AP24 panel with S6E88A0 controller"
depends on GPIOLIB && OF && REGULATOR
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index c19429b9e48d..146750b93455 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_DRM_PANEL_RENESAS_R69328) += panel-renesas-r69328.o
obj-$(CONFIG_DRM_PANEL_RONBO_RB070D30) += panel-ronbo-rb070d30.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01) += panel-samsung-ams581vf01.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08) += panel-samsung-ams639rq08.o
+obj-$(CONFIG_DRM_PANEL_SAMSUNG_ANA6707) += panel-samsung-ana6707.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20) += panel-samsung-atna33xc20.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_DB7430) += panel-samsung-db7430.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o
diff --git a/drivers/gpu/drm/panel/panel-samsung-ana6707.c b/drivers/gpu/drm/panel/panel-samsung-ana6707.c
new file mode 100644
index 000000000000..83bf954e89d3
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-samsung-ana6707.c
@@ -0,0 +1,461 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Marijn Suijten <marijn.suijten@somainline.org>
+ *
+ * Based on the following Sony downstream DTS command sequences:
+ * - Xperia 1 III (sagami pdx215): https://github.com/sonyxperiadev/kernel-copyleft-dts/blob/61.2.A.0.xxx/somc/dsi-panel-ana6707_amb650yl01-uhd-pvt.dtsi
+ * - Xperia 1 IV (nagara pdx223): https://github.com/sonyxperiadev/kernel-copyleft-dts/blob/64.1.A.0.xxx/display-devicetree/display/dsi-panel-ana6707_amb650yl01-uhd-pdx223.dtsi
+ * - Xperia 1 V (yodo pdx234): https://github.com/sonyxperiadev/kernel-copyleft-dts/blob/67.0.A.1.xxx/display-devicetree/display/dsi-panel-ana6707_amb650yl01-uhd.dtsi
+ */
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/display/drm_dsc.h>
+#include <drm/display/drm_dsc_helper.h>
+
+#define WRITE_CONTROL_DISPLAY_BACKLIGHT BIT(5)
+
+/*
+ * TODO: This should be communicated via the mode when .prepare
+ * receives atomic commit info
+ */
+static const bool enable_4k = false, enable_120hz = true;
+
+const struct regulator_bulk_data samsung_ana6707_supplies[] = {
+ { .supply = "vddio", /* 1.8 V */ },
+ { .supply = "vci", /* 3.0 V */ },
+};
+
+struct samsung_ana6707 {
+ struct drm_panel panel;
+ struct mipi_dsi_device *dsi[2];
+ struct drm_dsc_config dsc;
+ struct regulator_bulk_data *supplies;
+ struct gpio_desc *reset_gpio;
+};
+
+static inline struct samsung_ana6707 *
+to_samsung_ana6707(struct drm_panel *panel)
+{
+ return container_of(panel, struct samsung_ana6707, panel);
+}
+
+static void samsung_ana6707_reset(struct samsung_ana6707 *ctx)
+{
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ usleep_range(5000, 6000);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ usleep_range(1000, 2000);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ usleep_range(10000, 11000);
+}
+
+static int samsung_ana6707_program(struct samsung_ana6707 *ctx)
+{
+ const u16 hdisplay = enable_4k ? 1644 : 1096;
+ const u16 vdisplay = enable_4k ? 3840 : 2560;
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi[0] };
+
+ ctx->dsi[0]->mode_flags &= ~MIPI_DSI_MODE_LPM;
+ ctx->dsi[1]->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 15);
+
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x16);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x44);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbd, 0x00, 0xa0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed, 0x46, 0x00, 0x0e, 0x90);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60,
+ enable_4k ? 0x00 : 0x04,
+ enable_120hz ? 0x00 : 0xc0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+
+ mipi_dsi_dcs_set_column_address_multi(&dsi_ctx, 0, hdisplay - 1);
+ mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0, vdisplay - 1);
+ mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+ /*
+ * Warning: downstream codes this to 3840 only in 1069x2560@60Hz mode, which causes
+ * tearing and an ugly DSC-corruption-like line at the top of the screen.
+ * enable_4k | enable_120hz ? 0 : 3840
+ */
+ mipi_dsi_dcs_set_tear_scanline_multi(&dsi_ctx, 0);
+
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x09);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x09, 0x78);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+ WRITE_CONTROL_DISPLAY_BACKLIGHT);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0x27, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd7, 0x82);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_msleep(&dsi_ctx, 110);
+
+ return 0;
+}
+
+static int samsung_ana6707_prepare(struct drm_panel *panel)
+{
+ struct samsung_ana6707 *ctx = to_samsung_ana6707(panel);
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi[0] };
+ struct mipi_dsi_device *dsi = ctx->dsi[0];
+ struct device *dev = &dsi->dev;
+ struct drm_dsc_picture_parameter_set pps;
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(samsung_ana6707_supplies), ctx->supplies);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enable regulators: %d\n", ret);
+ return ret;
+ }
+
+ samsung_ana6707_reset(ctx);
+
+ msleep(120);
+
+ ret = samsung_ana6707_program(ctx);
+ if (ret < 0) {
+ dev_err(dev, "Failed to initialize panel: %d\n", ret);
+ goto fail;
+ }
+
+ msleep(120);
+
+ drm_dsc_pps_payload_pack(&pps, &ctx->dsc);
+
+ mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps);
+ mipi_dsi_compression_mode_multi(&dsi_ctx, true);
+ mipi_dsi_msleep(&dsi_ctx, 28);
+
+ ret = dsi_ctx.accum_err;
+
+ if (ret < 0)
+ goto fail;
+
+ return 0;
+
+fail:
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ regulator_bulk_disable(ARRAY_SIZE(samsung_ana6707_supplies), ctx->supplies);
+ return ret;
+}
+
+static int samsung_ana6707_enable(struct drm_panel *panel)
+{
+ struct samsung_ana6707 *ctx = to_samsung_ana6707(panel);
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi[0] };
+
+ mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 10);
+
+ return dsi_ctx.accum_err;
+}
+
+static int samsung_ana6707_disable(struct drm_panel *panel)
+{
+ struct samsung_ana6707 *ctx = to_samsung_ana6707(panel);
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi[0] };
+
+ mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 20);
+
+ return dsi_ctx.accum_err;
+}
+
+static int samsung_ana6707_unprepare(struct drm_panel *panel)
+{
+ struct samsung_ana6707 *ctx = to_samsung_ana6707(panel);
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi[0] };
+
+ mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 120);
+
+ ctx->dsi[0]->mode_flags &= ~MIPI_DSI_MODE_LPM;
+ ctx->dsi[1]->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ regulator_bulk_disable(ARRAY_SIZE(samsung_ana6707_supplies), ctx->supplies);
+
+ return dsi_ctx.accum_err;
+}
+
+static const int fake_porch_4k = 120;
+
+/*
+ * All of the horizontal values here are x2 of what's specified in the downstream device-tree,
+ * as the information there has already been pre-divided by the number of DSI hosts
+ */
+
+static const struct drm_display_mode samsung_ana6707_mode_4k = {
+ .clock = (1644 + fake_porch_4k) * 3840 * 60 / 1000,
+ .hdisplay = 1644,
+ .hsync_start = 1644,
+ .hsync_end = 1644,
+ .htotal = 1644 + fake_porch_4k,
+ .vdisplay = 3840,
+ .vsync_start = 3840,
+ .vsync_end = 3840,
+ .vtotal = 3840,
+ .width_mm = 65,
+ .height_mm = 152,
+ .type = DRM_MODE_TYPE_DRIVER,
+};
+
+static const int fake_porch_4k_120 = 216;
+
+static const struct drm_display_mode samsung_ana6707_mode_4k_120 = {
+ .clock = (1644 + fake_porch_4k_120) * 3840 * 120 / 1000,
+ .hdisplay = 1644,
+ .hsync_start = 1644,
+ .hsync_end = 1644,
+ .htotal = 1644 + fake_porch_4k_120,
+ .vdisplay = 3840,
+ .vsync_start = 3840,
+ .vsync_end = 3840,
+ .vtotal = 3840,
+ .width_mm = 65,
+ .height_mm = 152,
+ .type = DRM_MODE_TYPE_DRIVER,
+};
+
+static const int fake_porch = 100;
+
+static const struct drm_display_mode samsung_ana6707_mode = {
+ .clock = (1096 + fake_porch) * 2560 * 60 / 1000,
+ .hdisplay = 1096,
+ .hsync_start = 1096,
+ .hsync_end = 1096,
+ .htotal = 1096 + fake_porch,
+ .vdisplay = 2560,
+ .vsync_start = 2560,
+ .vsync_end = 2560,
+ .vtotal = 2560,
+ .width_mm = 65,
+ .height_mm = 152,
+ .type = DRM_MODE_TYPE_DRIVER,
+};
+
+static const int fake_porch_120 = 130;
+
+static const struct drm_display_mode samsung_ana6707_mode_120 = {
+ .clock = (1096 + fake_porch_120) * 2560 * 120 / 1000,
+ .hdisplay = 1096,
+ .hsync_start = 1096,
+ .hsync_end = 1096,
+ .htotal = 1096 + fake_porch_120,
+ .vdisplay = 2560,
+ .vsync_start = 2560,
+ .vsync_end = 2560,
+ .vtotal = 2560,
+ .width_mm = 65,
+ .height_mm = 152,
+ .type = DRM_MODE_TYPE_DRIVER,
+};
+
+static int samsung_ana6707_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ const struct drm_display_mode *mode;
+
+ /*
+ * TODO: return all 4 modes when drm_bridge/drm_panel get it back in an
+ * atomic_prepare callback
+ */
+ if (enable_4k) {
+ if (enable_120hz)
+ mode = &samsung_ana6707_mode_4k_120;
+ else
+ mode = &samsung_ana6707_mode_4k;
+ } else {
+ if (enable_120hz)
+ mode = &samsung_ana6707_mode_120;
+ else
+ mode = &samsung_ana6707_mode;
+ }
+
+ return drm_connector_helper_get_modes_fixed(connector, mode);
+}
+
+static const struct drm_panel_funcs samsung_ana6707_panel_funcs = {
+ .prepare = samsung_ana6707_prepare,
+ .enable = samsung_ana6707_enable,
+ .disable = samsung_ana6707_disable,
+ .unprepare = samsung_ana6707_unprepare,
+ .get_modes = samsung_ana6707_get_modes,
+};
+
+static int samsung_ana6707_bl_update_status(struct backlight_device *bl)
+{
+ struct mipi_dsi_device *dsi = bl_get_data(bl);
+ u16 brightness = backlight_get_brightness(bl);
+
+ return mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
+}
+
+static const struct backlight_ops samsung_ana6707_bl_ops = {
+ .update_status = samsung_ana6707_bl_update_status,
+};
+
+static int samsung_ana6707_probe(struct mipi_dsi_device *dsi)
+{
+ const struct backlight_properties props = {
+ .type = BACKLIGHT_RAW,
+ .brightness = 3000,
+ .max_brightness = 4095,
+ };
+ const u16 hdisplay = enable_4k ? 1644 : 1096;
+ struct mipi_dsi_host *dsi_sec_host;
+ struct samsung_ana6707 *ctx;
+ struct device *dev = &dsi->dev;
+ struct device_node *dsi_sec;
+ int ret, i;
+
+ ctx = devm_drm_panel_alloc(dev, struct samsung_ana6707, panel,
+ &samsung_ana6707_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ if (IS_ERR(ctx))
+ return PTR_ERR(ctx);
+
+ ret = devm_regulator_bulk_get_const(
+ dev,
+ ARRAY_SIZE(samsung_ana6707_supplies),
+ samsung_ana6707_supplies,
+ &ctx->supplies);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "Failed to get regulators\n");
+
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio))
+ return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+ "Failed to get reset-gpios\n");
+
+ dsi_sec = of_graph_get_remote_node(dsi->dev.of_node, 1, -1);
+ if (!dsi_sec)
+ return dev_err_probe(dev, -ENODEV,
+ "Cannot find secondary DSI OF node\n");
+
+ dev_info(dev, "Using Dual-DSI with OF node `%s`\n", dsi_sec->name);
+ const struct mipi_dsi_device_info info = { "ANA6707", 0,
+ dsi_sec };
+
+
+ dsi_sec_host = of_find_mipi_dsi_host_by_node(dsi_sec);
+ of_node_put(dsi_sec);
+ if (!dsi_sec_host)
+ return dev_err_probe(dev, -EPROBE_DEFER,
+ "Cannot get secondary DSI host\n");
+
+ ctx->dsi[1] = devm_mipi_dsi_device_register_full(dev, dsi_sec_host, &info);
+ if (IS_ERR(ctx->dsi[1]))
+ return dev_err_probe(dev, PTR_ERR(ctx->dsi[1]),
+ "Cannot register secondary DSI device\n");
+
+ mipi_dsi_set_drvdata(ctx->dsi[1], ctx);
+
+ ctx->dsi[0] = dsi;
+ mipi_dsi_set_drvdata(dsi, ctx);
+
+ ctx->panel.prepare_prev_first = true;
+
+ ctx->panel.backlight = devm_backlight_device_register(
+ dev, dev_name(dev), dev, dsi,
+ &samsung_ana6707_bl_ops,
+ &props);
+ if (IS_ERR(ctx->panel.backlight))
+ return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
+ "Failed to create backlight\n");
+
+ drm_panel_add(&ctx->panel);
+
+ ctx->dsc.dsc_version_major = 1;
+ ctx->dsc.dsc_version_minor = 1;
+
+ ctx->dsc.slice_height = 32;
+ /* One slice per encoder */
+ ctx->dsc.slice_count = 1;
+ ctx->dsc.slice_width = hdisplay / 2; /* 2 encoders */
+ ctx->dsc.bits_per_component = 8;
+ ctx->dsc.bits_per_pixel = 8 << 4; /* 4 fractional bits */
+ ctx->dsc.block_pred_enable = true;
+
+ for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) {
+ /* This panel only supports DSC; unconditionally enable it */
+ ctx->dsi[i]->dsc = &ctx->dsc;
+
+ ctx->dsi[i]->lanes = 4;
+ ctx->dsi[i]->format = MIPI_DSI_FMT_RGB888;
+ ctx->dsi[i]->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+ ret = devm_mipi_dsi_attach(dev, ctx->dsi[i]);
+ /* TODO: Detach dsi0 if dsi1 failed? */
+ if (ret < 0) {
+ drm_panel_remove(&ctx->panel);
+ return dev_err_probe(dev, ret,
+ "Failed to attach to DSI%d\n", i);
+ }
+ }
+
+ return 0;
+}
+
+static void samsung_ana6707_remove(struct mipi_dsi_device *dsi)
+{
+ struct samsung_ana6707 *ctx = mipi_dsi_get_drvdata(dsi);
+ int ret, i;
+
+ for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) {
+ ret = mipi_dsi_detach(ctx->dsi[i]);
+ if (ret < 0)
+ dev_err(&ctx->dsi[i]->dev, "Failed to detach from DSI%d host: %d\n",
+ i, ret);
+ }
+
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id samsung_ana6707_of_match[] = {
+ { .compatible = "samsung,ana6707-amb650yl01" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, samsung_ana6707_of_match);
+
+static struct mipi_dsi_driver samsung_ana6707_driver = {
+ .probe = samsung_ana6707_probe,
+ .remove = samsung_ana6707_remove,
+ .driver = {
+ .name = "panel-samsung-ana6707",
+ .of_match_table = samsung_ana6707_of_match,
+ },
+};
+module_mipi_dsi_driver(samsung_ana6707_driver);
+
+MODULE_AUTHOR("Marijn Suijten <marijn.suijten@somainline.org>");
+MODULE_DESCRIPTION("DRM panel driver for Samsung ANA6707 Display-Driver-IC panels");
+MODULE_LICENSE("GPL");

--
2.52.0