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Sat, 10 Jan 2026 00:11:00 +0100 (CET) Date: Sat, 10 Jan 2026 00:11:00 +0100 From: Sebastian Reichel To: Anand Moon Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Heikki Krogerus , Greg Kroah-Hartman , Nicolas Frattaroli , FUKAUMI Naoki , Diederik de Haas , Yongbo Zhang , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Rockchip SoC support" , "open list:ARM/Rockchip SoC support" , open list , "open list:USB TYPEC CLASS" Subject: Re: [PATCH v1 1/3] arm64: dts: rockchip: rk3588-rock-5b-5bp-5t: Correct Type-C pin bias settings Message-ID: References: <20260103083232.9510-1-linux.amoon@gmail.com> <20260103083232.9510-2-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="qwkqzwpah4jl6gzl" Content-Disposition: inline In-Reply-To: X-Zoho-Virus-Status: 1 X-Zoho-Virus-Status: 1 X-Zoho-AV-Stamp: zmail-av-1.5.1/267.941.65 X-ZohoMailClient: External --qwkqzwpah4jl6gzl Content-Type: text/plain; protected-headers=v1; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Subject: Re: [PATCH v1 1/3] arm64: dts: rockchip: rk3588-rock-5b-5bp-5t: Correct Type-C pin bias settings MIME-Version: 1.0 Hi, On Thu, Jan 08, 2026 at 12:24:50PM +0530, Anand Moon wrote: > Hi Sebastian, >=20 > Thanks for your review comments. >=20 > On Sat, 3 Jan 2026 at 19:23, Sebastian Reichel > wrote: > > > > Hi, > > > > On Sat, Jan 03, 2026 at 02:01:17PM +0530, Anand Moon wrote: > > > As pre FUSB302 datasheet interrupt line (INT_N) is an open-drain, > > > active-low signal. It requires a pull-up resistor to maintain a stable > > > high state when deasserted. Similarly, the TYPEC5V_PWREN_H enable sig= nal > > > requires a pull-down resistor to ensure it defaults to a low state, > > > preventing unintended power delivery during the boot sequence. > > > > > > Update the pinctrl entries to use pcfg_pull_up for usbc0_int and > > > pcfg_pull_down for vbus5v0_typec_en to align with the hardware's > > > electrical requirements. > > > > > > Cc: Sebastian Reichel > > > Fixes: 67b2c15d8fb3 ("arm64: dts: rockchip: add USB-C support for ROC= K 5B/5B+/5T") > > > Signed-off-by: Anand Moon > > > --- > > > v1: As per the shematics CC_INT_L interrupt pin is GPIO3_B4_u > > > As per the shematics TYPEC5V_PWREN_H pin is GPIO2_B6_d > > > --- > > > > Checking the schematics: > > > > 5B v1.45 - CC_INT_L - R2613 10K pull-up resistor > > 5B v1.45 - TYPEC5V_PWREN_H - GPIO is effectively unused because R95035 = is NC > > > > 5B+ v1.2 - CC_INT_L - R2613 10K pull-up resistor > > 5B+ v1.2 - TYPEC5V_PWREN_H - R163 100K pull-down resistor > > > > 5T v1.2 - CC_INT_L - R2613 10K pull-up resistor > > 5T v1.2 - TYPEC5V_PWREN_H - R163 100K pull-down resistor > > > CC_INT_L is gpio interrupt pin to enable the I2C read operation. >=20 > As per FUSB302 datasheet, here is the updated version of the commit messa= ge >=20 > Configure CC_INT_L as an active-low, open-drain output. Per the hardware = design, > this pin utilizes an external pull-up and is driven LOW by the Type-C > controller to > signal the processor to perform I2C register reads. >=20 > The TYPEC5V_PWREN_H pull-down resistor is turned on as a signal to > the Type-C regulator, which has an active-enable-high property. In this c= ontext, > the regulator is used to set the polarity of the GPIO used to enable or d= isable > the regulator. I don't understand what you want to say here. > > TLDR: All GPIOs have pull resistors in discrete hardware and do not > > need them muxed in the SoC. > > > It depends on the GPIO, pinctrl PMU configuration. as I try to say it does not depend on pinctrl configuration for any of the GPIOs you are touching. The pull resistors for them exist as components on the board. > I was thinking of converting the vbus5v0_typec regulator to 'regulator-gp= io.' > to better reflect the hardware schematics. The TYPEC5V_PWREN_H signal > (GPIO2_B6_d) acts as a state controller rather than a simple enable pin, > and this change ensures the device tree aligns with that design >=20 > [1] https://dl.radxa.com/rock5/5b/docs/hw/radxa_rock_5b_v1450_schematic.p= df > (page 28) >=20 > $ git diff arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi > b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi > index 5f58e339a052..387ff009ec76 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi > @@ -57,9 +57,10 @@ rfkill-bt { > }; >=20 > vbus5v0_typec: vbus5v0-typec { > - compatible =3D "regulator-fixed"; > + compatible =3D "regulator-gpio"; > enable-active-high; > - gpio =3D <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>; > + gpios =3D <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>; > + states =3D <5000000 0x1>, <0 0x0>; > pinctrl-names =3D "default"; > pinctrl-0 =3D <&vbus5v0_typec_en>; > regulator-name =3D "vbus5v0_typec"; >=20 > Could you please try this at your end? This is missing gpios-states, but I also see no point in testing that. Having one state as 0 effectively means this is a complicated version of regulator-fixed. The switch from "gpio" to "gpios" is valid though, since "gpio" is deprecated. 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