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[94.175.9.129]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47d865f0cf2sm110128995e9.3.2026.01.11.08.46.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jan 2026 08:46:52 -0800 (PST) Date: Sun, 11 Jan 2026 16:46:52 +0000 From: Stafford Horne To: Krzysztof Kozlowski Cc: LKML , Linux OpenRISC , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v3 2/6] dt-bindings: gpio-mmio: Add opencores GPIO Message-ID: References: <20260109134409.2153333-1-shorne@gmail.com> <20260109134409.2153333-3-shorne@gmail.com> <20260111-bold-wolf-of-champagne-58fac7@quoll> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260111-bold-wolf-of-champagne-58fac7@quoll> On Sun, Jan 11, 2026 at 11:18:42AM +0100, Krzysztof Kozlowski wrote: > On Fri, Jan 09, 2026 at 01:43:53PM +0000, Stafford Horne wrote: > > Add a device tree binding for the opencores GPIO controller. > > > > On FPGA Development boards with GPIOs the OpenRISC architecture uses the > > opencores gpio verilog rtl which is compatible with the MMIO GPIO driver. > > > > Link: https://opencores.org/projects/gpio > > Signed-off-by: Stafford Horne > > --- > > Since v2: > > - Fixup patch to simply add opencores,gpio and add an example. > > Simplify? You completely changed the meaning of binding here - now > device is not compatible. > > I don't know which one is correct, but your changelog must explain why > now devices are not compatible but they were before. Hello, Did you miss the 1/6 patch in this series? We add the compatible string to the driver there before we add it here. Sorry, I thought the series and the over letter would be enough to understand what I meant by the "Fixup" description here. > > Since v1: > > - Fix schema to actually match the example. > > > > Documentation/devicetree/bindings/gpio/gpio-mmio.yaml | 9 +++++++++ > > 1 file changed, 9 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml > > index ee5d5d25ae82..d44edc181e0a 100644 > > --- a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml > > +++ b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml > > @@ -23,6 +23,7 @@ properties: > > - ni,169445-nand-gpio > > - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller > > - intel,ixp4xx-expansion-bus-mmio-gpio > > + - opencores,gpio > > > > big-endian: true > > > > @@ -160,3 +161,11 @@ examples: > > intel,ixp4xx-eb-write-enable = <1>; > > }; > > }; > > + > > + gpio@91000000 { > > Please do not grow the examples if they are exactly the same as other. I figured this is a new compatible string with a different set of 8 bit registers so having this example would be beneficial. > > + compatible = "opencores,gpio"; > > + reg = <0x91000000 0x1>, <0x91000001 0x1>; > > + reg-names = "dat", "dirout"; > > + gpio-controller; > > + #gpio-cells = <2>; > > + }; > > -- > > 2.51.0 > >