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From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Len Brown <lenb@kernel.org>,
	Robert Moore <robert.moore@intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Hanjun Guo <guohanjun@huawei.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	Jose Marinho <jose.marinho@arm.com>
Subject: Re: [PATCH v2 0/7] irqchip/gic-v5: Code first ACPI boot support
Date: Wed, 14 Jan 2026 18:03:10 +0100	[thread overview]
Message-ID: <aWfMTjukKcIlQugi@lpieralisi> (raw)
In-Reply-To: <CAJZ5v0gqso3q8gUZ3wPq1iG7zOBUu2cWMDZiHqCBU5dgdu_KTQ@mail.gmail.com>

On Wed, Jan 14, 2026 at 04:56:53PM +0100, Rafael J. Wysocki wrote:
> On Thu, Dec 18, 2025 at 11:15 AM Lorenzo Pieralisi
> <lpieralisi@kernel.org> wrote:
> >
> > The ACPI and ACPI IORT specifications were updated to support bindings
> > required to describe GICv5 based systems.
> >
> > The ACPI specification GICv5 bindings ECR [1] were approved and the
> > required changes merged in the ACPICA upstream repository[5].
> >
> > The Arm IORT specification [2] has been updated to include GICv5 IWB
> > specific bindings in revision E.g.
> >
> > Implement kernel code that - based on the aforementioned bindings - adds
> > support for GICv5 ACPI probing.
> >
> > ACPICA changes supporting the bindings are posted with the series; they
> > were cherry-picked from the upcoming ACPICA Linuxised release patches
> > and they should _not_ be merged in any upstream branch because the
> > full set of Linuxised ACPICA changes will be subsequently posted in
> > order to be merged, I added the two ACPICA patches to make the series
> > self-contained.
> 
> The patches in question have been included in this series:
> 
> https://lore.kernel.org/linux-acpi/12822121.O9o76ZdvQC@rafael.j.wysocki/
> 
> and are going to be applied shortly.

Thanks Rafael, I will rebase the series and mark the dependency then.

Lorenzo

      reply	other threads:[~2026-01-14 17:03 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-18 10:14 [PATCH v2 0/7] irqchip/gic-v5: Code first ACPI boot support Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 1/7] ACPICA: Add GICv5 MADT structures Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 2/7] ACPICA: Add Arm IORT IWB node definitions Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 3/7] irqdomain: Add parent field to struct irqchip_fwid Lorenzo Pieralisi
2026-01-05 12:01   ` Jonathan Cameron
2026-01-07  8:58     ` Lorenzo Pieralisi
2026-01-07 10:04       ` Jonathan Cameron
2026-01-07 17:31         ` Lorenzo Pieralisi
2026-01-13  9:37           ` Thomas Gleixner
2026-01-13 11:04         ` Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 4/7] PCI/MSI: Make the pci_msi_map_rid_ctlr_node() interface firmware agnostic Lorenzo Pieralisi
2026-01-05 12:21   ` Jonathan Cameron
2026-01-07  9:23     ` Lorenzo Pieralisi
2026-01-05 17:35   ` Bjorn Helgaas
2025-12-18 10:14 ` [PATCH v2 5/7] irqchip/gic-v5: Add ACPI IRS probing Lorenzo Pieralisi
2026-01-05 13:24   ` Jonathan Cameron
2026-01-08 16:22     ` Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 6/7] irqchip/gic-v5: Add ACPI ITS probing Lorenzo Pieralisi
2026-01-05 13:55   ` Jonathan Cameron
2026-01-08 16:13     ` Lorenzo Pieralisi
2025-12-18 10:14 ` [PATCH v2 7/7] irqchip/gic-v5: Add ACPI IWB probing Lorenzo Pieralisi
2026-01-05 15:35   ` Jonathan Cameron
2026-01-08 16:12     ` Lorenzo Pieralisi
2026-01-14 15:56 ` [PATCH v2 0/7] irqchip/gic-v5: Code first ACPI boot support Rafael J. Wysocki
2026-01-14 17:03   ` Lorenzo Pieralisi [this message]

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