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AJvYcCWY/DGDwkqLAtMJMvoBFuaJnZW+GKPPBCOur5MbxROHbxBh8B5M6KZ7tj5VtJcJpf2+iQjWMAbvkPK27fs=@vger.kernel.org X-Gm-Message-State: AOJu0YxpPhcQ+D3ynx8rfRQc76f4TtsIDIX6jCSjCZfv/NCQWYWMwyll j4d1KiKuaqj9sqFBk2VlLuIj2GN8Mn5qa6VNWUxw/Ny5jGzRKkAYLafH7lTZRiZNyKQIOoGgN9Z B3NnHAlfQforBHoNTJg== X-Received: from wrbei5.prod.google.com ([2002:a05:6000:4185:b0:430:f681:413d]) (user=aliceryhl job=prod-delivery.src-stubby-dispatcher) by 2002:a5d:5d89:0:b0:42b:4267:83e9 with SMTP id ffacd0b85a97d-4342c4f4cdemr7491225f8f.2.1768491364318; Thu, 15 Jan 2026 07:36:04 -0800 (PST) Date: Thu, 15 Jan 2026 15:36:03 +0000 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251202220924.520644-1-lyude@redhat.com> <20251202220924.520644-8-lyude@redhat.com> Message-ID: Subject: Re: [PATCH v6 7/8] rust: Introduce iosys_map bindings From: Alice Ryhl To: Danilo Krummrich Cc: Lyude Paul , dri-devel@lists.freedesktop.org, rust-for-linux@vger.kernel.org, Daniel Almeida , linux-kernel@vger.kernel.org, Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , "=?utf-8?B?QmrDtnJu?= Roy Baron" , Benno Lossin , Andreas Hindborg , Trevor Gross , Greg Kroah-Hartman , Viresh Kumar , FUJITA Tomonori , Krishna Ketan Rai , Tamir Duberstein , Xiangfei Ding , Zhi Wang , Matthew Maurer , Alexandre Courbot Content-Type: text/plain; charset="utf-8" On Thu, Jan 15, 2026 at 12:21:51AM +0100, Danilo Krummrich wrote: > (Cc: Zhi, Matt, Alex) > > On Tue Dec 2, 2025 at 11:03 PM CET, Lyude Paul wrote: > > This introduces a set of bindings for working with iosys_map in rust code. > > The design of this is heavily based off the design for both the io and > > dma_map bindings for Rust. > > I already had a chat with Lyude about this, but also want to post it here. I > have mainly two comment on this: > > (1) The backing memory of iosys_map may be a device resource and hence has to > be protected against (bus) device / driver unbind. > > (2) The idea for the generic I/O infrastructure is to support arbitrary I/O > backends rather than only MMIO. For instance, this can also be PCI > configuration space, I2C, SPI, etc., but also DMA, VRAM, system memory, > etc. > > For this, there is a patch series from Zhi [1] splitting up the current > I/O structures into traits that we will land soon. > > We will also have macros analogous to dma_read!() and dma_write!() for the > generic I/O infrastructure, which Matt also works on for his QC SoC > driver. > > This will allow us to unify all kinds of I/O operations into a single > interface, supporting the read!() and write!() accessors for values, the > register!() macro and raw accessors, such as e.g. read32(). > > With this we will have something that is way more powerful than iosys_map > and makes this abstraction obsolete. The trait approach generally requires knowing the target type at compile-time or paying dynamic function calls, but my understanding is that iosys exists because you might not know which variant you want at compile-time. Perhaps we need an enum Iosys { SystemMemory(...), DmaMemory(...), } and implement Io for Iosys in terms of the inner types. Alice