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From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Will Deacon <will@kernel.org>, <robin.murphy@arm.com>,
	<joro@8bytes.org>, <linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux.dev>, <linux-kernel@vger.kernel.org>,
	<skolothumtho@nvidia.com>, <praan@google.com>,
	<xueshuai@linux.alibaba.com>, <smostafa@google.com>
Subject: Re: [PATCH rc v5 1/4] iommu/arm-smmu-v3: Add update_safe bits to fix STE update sequence
Date: Thu, 15 Jan 2026 08:25:05 -0800	[thread overview]
Message-ID: <aWkU4a1wj5jsWFev@Asurada-Nvidia> (raw)
In-Reply-To: <20260115131151.GA1081267@nvidia.com>

On Thu, Jan 15, 2026 at 09:11:51AM -0400, Jason Gunthorpe wrote:
> On Tue, Jan 13, 2026 at 04:51:12PM -0400, Jason Gunthorpe wrote:
> > > -       safe_bits[1] |= cpu_to_le64(STRTAB_STE_1_EATS);
> > > +       if (!((cur[2] | target[2]) & cpu_to_le64(STRTAB_STE_2_S2S)))
> > > +               safe_bits[1] |= cpu_to_le64(
> > > +                       FIELD_PREP(STRTAB_STE_1_EATS, STRTAB_STE_1_EATS_TRANS));
> > > --------------------------------------------------------------------------
> > > 
> > > @will, does this look good to you? I can send a v7 with this.
> > 
> > That is an easy way to address Will's observation, makes sense to me.
> 
> Ah, but it looks like it can generate an errant view of a EATS that is
> neither old or new. Ie value 3, reserved.
> 
> I think you should just check if old or new has EATS bit 1 set:
> 
> if (!((cur[2] | target[2]) & cpu_to_le64(STRTAB_STE_2_S2S)) &&
>     !((cur[1] | target[1]) & cpu_to_le64(FIELD_PREP(STRTAB_STE_1_EATS, 2))))
> 
> Which the current driver never does..

The EATS field is completely controlled by the driver. So, we are
safe for now, right?

Should we add this when the driver has the actual support for the
split stage thing?

Thanks
Nicolin

  reply	other threads:[~2026-01-15 16:25 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-18 21:41 [PATCH rc v5 0/4] iommu/arm-smmu-v3: Fix hitless STE update in nesting cases Nicolin Chen
2025-12-18 21:41 ` [PATCH rc v5 1/4] iommu/arm-smmu-v3: Add update_safe bits to fix STE update sequence Nicolin Chen
2026-01-02 18:26   ` Mostafa Saleh
2026-01-07 21:20   ` Will Deacon
2026-01-08  0:36     ` Jason Gunthorpe
2026-01-12 15:53       ` Will Deacon
2026-01-12 16:10         ` Jason Gunthorpe
2026-01-12 18:58           ` Nicolin Chen
2026-01-13 15:05             ` Will Deacon
2026-01-13 16:12               ` Jason Gunthorpe
2026-01-13 20:29                 ` Nicolin Chen
2026-01-13 20:51                   ` Jason Gunthorpe
2026-01-15 13:11                     ` Jason Gunthorpe
2026-01-15 16:25                       ` Nicolin Chen [this message]
2026-01-15 16:29                         ` Jason Gunthorpe
2026-01-15 16:34                           ` Nicolin Chen
2026-01-15 17:39                             ` Will Deacon
2025-12-18 21:41 ` [PATCH rc v5 2/4] iommu/arm-smmu-v3: Mark STE MEV safe when computing the " Nicolin Chen
2026-01-02 18:27   ` Mostafa Saleh
2025-12-18 21:41 ` [PATCH rc v5 3/4] iommu/arm-smmu-v3: Mark STE EATS " Nicolin Chen
2025-12-18 21:41 ` [PATCH rc v5 4/4] iommu/arm-smmu-v3-test: Add nested s1bypass/s1dssbypass coverage Nicolin Chen
2026-01-02 18:27   ` Mostafa Saleh

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