From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 197863BC4F2 for ; Thu, 15 Jan 2026 18:16:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768501019; cv=none; b=W8QEFPXeY0SttTSRO4GSUmkTE7UzdevgL3NjlzII7noVbK8viSQtH7aqs4Bqc6e6vdY/qhUe9z7ChnyFgpq0rogMzCTM5qtqDk1Vy8xfhirogKWSdnDVFX+wUeYeSO5iFNtvxJxzhqhZyPifR/GvgeKiS26FrJIYwqHlfyKF1Lo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768501019; c=relaxed/simple; bh=vkUae6H9MJaAh4/qbR0VmYjcV0Wtm8RWtwoYs7cfGOY=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=efm9fdiBk2U+lgY50lLSel1W6QF0vKh4Z2dXXOccI2ZyS07wrHnXkKbmvmNYkEg8rYL6keuECHXRFOLyNoX2pkMhBl/DJzDD844gF2r9zVMZRWztp6XwySklgfxU6tx3CvcDw/TwtxX/Qi9teION/r4EKao7SOyk2xux5kqXugs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CF95F1515; Thu, 15 Jan 2026 10:16:50 -0800 (PST) Received: from arm.com (arrakis.cambridge.arm.com [10.1.197.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2F1593F632; Thu, 15 Jan 2026 10:16:52 -0800 (PST) Date: Thu, 15 Jan 2026 18:16:49 +0000 From: Catalin Marinas To: Ben Horgan Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev Subject: Re: [PATCH v3 08/47] arm64: mpam: Advertise the CPUs MPAM limits to the driver Message-ID: References: <20260112165914.4086692-1-ben.horgan@arm.com> <20260112165914.4086692-9-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260112165914.4086692-9-ben.horgan@arm.com> On Mon, Jan 12, 2026 at 04:58:35PM +0000, Ben Horgan wrote: > From: James Morse > > Requestors need to populate the MPAM fields for any traffic they send on > the interconnect. For the CPUs these values are taken from the > corresponding MPAMy_ELx register. Each requestor may have a limit on the > largest PARTID or PMG value that can be used. The MPAM driver has to > determine the system-wide minimum supported PARTID and PMG values. > > To do this, the driver needs to be told what each requestor's limit is. > > CPUs are special, but this infrastructure is also needed for the SMMU and > GIC ITS. Call the helper to tell the MPAM driver what the CPUs can do. > > The return value can be ignored by the arch code as it runs well before the > MPAM driver starts probing. > > Reviewed-by: Jonathan Cameron > Signed-off-by: James Morse > Signed-off-by: Ben Horgan Reviewed-by: Catalin Marinas