From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 183802C0278 for ; Thu, 22 Jan 2026 11:49:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769082561; cv=none; b=Cxp8ceemzilk2mPEsEmjcKxf9hfb0pTK27hF3xcZLMbbexJlCzvvd9knVBKV9hit2GQcdrCCL9VoeULUuugbvt1rI0wdlKL8HS6zlTTfMzrKD7OGWioS/TlErG0WyIDTxRc4yWMKh1RupW3+xT/Wg1ETydne/frOwPkEgnHWmgo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769082561; c=relaxed/simple; bh=sZIWz4ZJ0UQTmtkwnb0/nddFn8qy8PSObcdLT7wq69I=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=VoyJWH8TnOAWXck4k6G13K9wkLKi2ZZGZEgHVi+a5p9vpCPPIerzE3NaTsylrskAYuc59h0FVFDUvBA+agqXqm1P0D8cBkXSDTRblIxSaXOsKt/PMWm8nluQ2bZKtOMuF0Sw2fCAfJGqwGrj+EBwuXOcjo45+AJerP5161NFa/Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AF9C41476; Thu, 22 Jan 2026 03:49:11 -0800 (PST) Received: from arm.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 579503F632; Thu, 22 Jan 2026 03:49:17 -0800 (PST) Date: Thu, 22 Jan 2026 11:49:15 +0000 From: Catalin Marinas To: Usama Anjum Cc: Carl Worth , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Taehyun Noh , Peter Collingbourne Subject: Re: [PATCH v2 2/2] arm64: mte: Set TCMA1 whenever MTE is present in the kernel Message-ID: References: <20251030-mte-tighten-tco-v2-0-e259dda9d5b3@os.amperecomputing.com> <20251030-mte-tighten-tco-v2-2-e259dda9d5b3@os.amperecomputing.com> <7e47cccb-5d9f-470d-9de1-8caddc300646@foss.arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7e47cccb-5d9f-470d-9de1-8caddc300646@foss.arm.com> On Thu, Jan 22, 2026 at 10:23:01AM +0000, Usama Anjum wrote: > On 15/01/2026 11:07 pm, Carl Worth wrote: > > Set the TCMA1 bit so that access to TTBR1 addresses with 0xf in their > > tag bits will be treated as tag unchecked. > > > > This is important to avoid unwanted tag checking on some > > systems. Specifically, SCTLR_EL1.TCF can be set to indicate that no > > tag check faults are desired. But the architecture doesn't guarantee > > that in this case the system won't still perform tag checks. > > > > Use TCMA1 to ensure that undesired tag checks are not performed. This > > bit was already set in the KASAN case. Adding it to the non-KASAN case > > prevents tag checking since all TTBR1 address will have a value of 0xf > > in their tag bits. > > > > This patch has been measured on an Ampere system to improve the following: > > > > * Eliminate over 98% of kernel-side tag checks during "perf bench > > futex hash", as measured with "perf stat". > > > > * Eliminate all MTE overhead (was previously a 25% performance > > penalty) from the Phoronix pts/memcached benchmark (1:10 Set:Get > > ration with 96 cores). > > > > Reported-by: Taehyun Noh > > Suggested-by: Catalin Marinas > > Signed-off-by: Carl Worth > > Fixes tag is required here so that the fix traverses to the stable kernels. > I've not found the most appropriate commit: > > 973b9e373306 ("arm64: mte: move register initialization to C") > bfc62c598527 ("arm64: kasan: allow enabling in-kernel MTE") > > In my opinion, bfc62c598527 should be in the fixes-by tag. At a minimum, the > back porting should be done till 973b9e373306. We can always submit it for stable backports even without a fixes tag. It's more of a hardware implementation choice than actually fixing a kernel bug. The previous behaviour was also correct. -- Catalin