From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BDFF2F6925 for ; Fri, 23 Jan 2026 12:12:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769170343; cv=none; b=i5Io3e1zRmIBevbfM5BdM7D/KAz9TCkSC6NexPbHpPF7drinDxe5EOE7sZjQreaj5YxkwW73JK1SP3SJdrRXCkETnYqCbCN0Ez2b1DkZqPXACQd30kxUfzOHP+w0vIQqt1kya2W6oAnlnZdzQnk1AKh0Due6hGZnHYDDMzxAEgo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769170343; c=relaxed/simple; bh=mJnGfSnNZnYvNd/hH7XFW2DTHO9jL/r2IVbPDgGEdck=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=t5tlZjEfSBXmXw8Gi6Iug1EYAhu/DEAZaYBCvJGE0vz1tPh/1YMYCJ71ghF7SGHkponCgHQJ4dGLS1bs4FX81roCpL0u/fS74aI7T1hJaR6SFRK84RYeeEvump3JkKKoent7eExOiE63mf1Y2Rke90Ul32iQ5tFR72Qrnp9WC2g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=S06Qe1fJ; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="S06Qe1fJ" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-48049955f7fso15809485e9.0 for ; Fri, 23 Jan 2026 04:12:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1769170340; x=1769775140; darn=vger.kernel.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=mJfSzpptsvgNQ0mCpYmk8DIXrBhJMmuZV4W80Mdql0g=; b=S06Qe1fJRHnsJZj5Jtkq0CMISWEcQQBtc9arb8GtYxYB0N+nsUK90xgun6Kw7r9jxB rMSkgkqt4El/CMQi9Pmtc+pgti9tFf6xUjTzL4Q2PJhB/A0/N/Aw6qqm5CQiL32bGgeX JpV2H5sFB+1AyYmqgCCso4HnrVNZuwZt+ThNYf0jzXvZCdq7+VCZAPyUqWii+UXexsNR 1btVzirWVa8QncouXcNeZa9YDfXmpd8Cz16ShcRL4zWR+80IPB5KTybTiM6VsB8MtYsz O/j2mqUwLLgaA1EFB71gKAaRLbuOtYxNyYKFHGeMWKi02avZpCdK1iVBP/J6Bgl7nqrU Riog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769170340; x=1769775140; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-gg:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mJfSzpptsvgNQ0mCpYmk8DIXrBhJMmuZV4W80Mdql0g=; b=vrb2xpkOwetW4thQ20cPbtJX+9Lx+2uNt9kIQFts35QT4HcEBeVmgg2+r34TPbDKoP y3a53ezXB9ouXLUUSCmBJttvdOxuNUR+vIqIOTdXRFaoviqg+ah/ji7uZkqmQD4cHnbH 5iGjqVUNwrxLRBlqymxZSza7+4K3LUFXaIeXM8gsWkHZ+LaSCoN1PN7mqGOoNPg3xvPW +EDgKDnY5MvsMDWKIhgQhlZaKQMzix15tv4vwuzmpmzOx2z4kZIqOS8jdzOthEBrJNet dN2FuPSbV/4lmTe0RAD1vjrsVwlnB1vatJuMxB/dKYWmMR2LWNuWZkP4IAQ6KSa4mlVk L+SQ== X-Forwarded-Encrypted: i=1; AJvYcCW7c9CXWyrlQPTmn25BUCkQdisYkQfwk45bJhTUVLUTwmZHKsyWqKVKPyx0+02CTMT3Ay34fhRwMkoHFK8=@vger.kernel.org X-Gm-Message-State: AOJu0YwQMLVO2wAqbxhWPTUUqRU7pkrrd3RSWWnLNChfLbscBRVggsGt Qkw4IHLbVwVzRm2wgLOVUVkUctrrUJeNfM845MFYWwRqkpY/NmFZCRAxkbIyoVmpmw== X-Gm-Gg: AZuq6aLrHj25YJ8bOIMzznMJ/NrrCVBqcAMRXQzapJdQEzJkumU0pjgc7DC6waZupmC +2PRJo4T6zzrvHUw3BuRlQsk6uxtUWW9jQr6bHVRG8t8C+UExsaLdLcfq8H/PC1fGrDgHCwnmdJ zQhcMVZ96z+eyAFquoafXTVSmej61wHeAJ3thio+UsQbWpysBInXrhIsHiVK2F63yn/Sy6TeFoz D8EzzdsqmMFgFdMFrlB7IarAefgZg9ic3/5gjbupUf10IYhaTGpT4qUdfmJ8y3lUPUadLnXQjwJ Im4Bgn3j21yI+GuOTH4BuX0//ILfUqTiZE8gMeiNTBqr5Z+QSBVcgTJwVE6poawaHiSWjvH6H87 TAQkrPLMjdOJHj2ABVerU8wxiYHI9/wIfOuweSnnjkrhYGnmEqsshkTOx+ekKn6Jq/t2X7slSC9 zMNeWaUuDJAGgqNCjU5ct6Jd13TM2dtDhJJNcIiMsBfke/hGzDnA== X-Received: by 2002:a05:600c:5253:b0:47a:8154:33e3 with SMTP id 5b1f17b1804b1-48051256401mr19426385e9.28.1769170339674; Fri, 23 Jan 2026 04:12:19 -0800 (PST) Received: from google.com (44.145.34.34.bc.googleusercontent.com. [34.34.145.44]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4804d8a5b67sm47732645e9.10.2026.01.23.04.12.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jan 2026 04:12:19 -0800 (PST) Date: Fri, 23 Jan 2026 12:12:15 +0000 From: Vincent Donnefort To: Marc Zyngier Cc: rostedt@goodmis.org, mhiramat@kernel.org, mathieu.desnoyers@efficios.com, linux-trace-kernel@vger.kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, jstultz@google.com, qperret@google.com, will@kernel.org, aneesh.kumar@kernel.org, kernel-team@android.com, linux-kernel@vger.kernel.org, Thomas Gleixner , Stephen Boyd , "Christopher S. Hall" , Richard Cochran Subject: Re: [PATCH v9 25/30] KVM: arm64: Sync boot clock with the nVHE/pKVM hyp Message-ID: References: <20251202093623.2337860-1-vdonnefort@google.com> <20251202093623.2337860-26-vdonnefort@google.com> <86bjj5mrhn.wl-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <86bjj5mrhn.wl-maz@kernel.org> On Wed, Jan 07, 2026 at 02:23:16PM +0000, Marc Zyngier wrote: > On Tue, 02 Dec 2025 09:36:18 +0000, > Vincent Donnefort wrote: > > > > Configure the hypervisor tracing clock with the kernel boot clock. For > > tracing purposes, the boot clock is interesting: it doesn't stop on > > suspend. However, it is corrected on a regular basis, which implies the > > need to re-evaluate it every once in a while. > > > > Cc: John Stultz > > Cc: Thomas Gleixner > > Cc: Stephen Boyd > > Cc: Christopher S. Hall > > Cc: Richard Cochran > > Signed-off-by: Vincent Donnefort > > > > diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h > > index f83650a7aad9..375607c67285 100644 > > --- a/arch/arm64/include/asm/kvm_asm.h > > +++ b/arch/arm64/include/asm/kvm_asm.h > > @@ -93,6 +93,7 @@ enum __kvm_host_smccc_func { > > __KVM_HOST_SMCCC_FUNC___tracing_unload, > > __KVM_HOST_SMCCC_FUNC___tracing_enable, > > __KVM_HOST_SMCCC_FUNC___tracing_swap_reader, > > + __KVM_HOST_SMCCC_FUNC___tracing_update_clock, > > }; > > > > #define DECLARE_KVM_VHE_SYM(sym) extern char sym[] > > diff --git a/arch/arm64/kvm/hyp/include/nvhe/trace.h b/arch/arm64/kvm/hyp/include/nvhe/trace.h > > index 7da8788ce527..fd641e1b1c23 100644 > > --- a/arch/arm64/kvm/hyp/include/nvhe/trace.h > > +++ b/arch/arm64/kvm/hyp/include/nvhe/trace.h > > @@ -11,6 +11,7 @@ int __tracing_load(unsigned long desc_va, size_t desc_size); > > void __tracing_unload(void); > > int __tracing_enable(bool enable); > > int __tracing_swap_reader(unsigned int cpu); > > +void __tracing_update_clock(u32 mult, u32 shift, u64 epoch_ns, u64 epoch_cyc); > > #else > > static inline void *tracing_reserve_entry(unsigned long length) { return NULL; } > > static inline void tracing_commit_entry(void) { } > > @@ -19,5 +20,6 @@ static inline int __tracing_load(unsigned long desc_va, size_t desc_size) { retu > > static inline void __tracing_unload(void) { } > > static inline int __tracing_enable(bool enable) { return -ENODEV; } > > static inline int __tracing_swap_reader(unsigned int cpu) { return -ENODEV; } > > +static inline void __tracing_update_clock(u32 mult, u32 shift, u64 epoch_ns, u64 epoch_cyc) { } > > #endif > > #endif > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > > index 8b78b29c2069..45b8f70828de 100644 > > --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c > > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > > @@ -613,6 +613,18 @@ static void handle___tracing_swap_reader(struct kvm_cpu_context *host_ctxt) > > cpu_reg(host_ctxt, 1) = __tracing_swap_reader(cpu); > > } > > > > +static void handle___tracing_update_clock(struct kvm_cpu_context *host_ctxt) > > +{ > > + DECLARE_REG(u32, mult, host_ctxt, 1); > > + DECLARE_REG(u32, shift, host_ctxt, 2); > > + DECLARE_REG(u64, epoch_ns, host_ctxt, 3); > > + DECLARE_REG(u64, epoch_cyc, host_ctxt, 4); > > + > > + __tracing_update_clock(mult, shift, epoch_ns, epoch_cyc); > > + > > + cpu_reg(host_ctxt, 1) = 0; > > What's the purpose of setting X1 to 0? This is a call returning void, > so I don't immediately see the need for this. Hum, nope nothing. And actually the same applies to __tracing_write_event() and __tracing_unload() > > > +} > > + > > typedef void (*hcall_t)(struct kvm_cpu_context *); > > > > #define HANDLE_FUNC(x) [__KVM_HOST_SMCCC_FUNC_##x] = (hcall_t)handle_##x > > @@ -658,6 +670,7 @@ static const hcall_t host_hcall[] = { > > HANDLE_FUNC(__tracing_unload), > > HANDLE_FUNC(__tracing_enable), > > HANDLE_FUNC(__tracing_swap_reader), > > + HANDLE_FUNC(__tracing_update_clock), > > }; > > > > static void handle_host_hcall(struct kvm_cpu_context *host_ctxt) > > diff --git a/arch/arm64/kvm/hyp/nvhe/trace.c b/arch/arm64/kvm/hyp/nvhe/trace.c > > index df9d66fcb3c9..97e9f6c1a52c 100644 > > --- a/arch/arm64/kvm/hyp/nvhe/trace.c > > +++ b/arch/arm64/kvm/hyp/nvhe/trace.c > > @@ -271,3 +271,19 @@ int __tracing_swap_reader(unsigned int cpu) > > > > return ret; > > } > > + > > +void __tracing_update_clock(u32 mult, u32 shift, u64 epoch_ns, u64 epoch_cyc) > > +{ > > + int cpu; > > + > > + /* After this loop, all CPUs are observing the new bank... */ > > + for (cpu = 0; cpu < hyp_nr_cpus; cpu++) { > > + struct simple_rb_per_cpu *simple_rb = per_cpu_ptr(trace_buffer.simple_rbs, cpu); > > + > > + while (READ_ONCE(simple_rb->status) == SIMPLE_RB_WRITING) > > + ; > > + } > > + > > + /* ...we can now override the old one and swap. */ > > + trace_clock_update(mult, shift, epoch_ns, epoch_cyc); > > +} > > diff --git a/arch/arm64/kvm/hyp_trace.c b/arch/arm64/kvm/hyp_trace.c > > index 2866effe28ec..1e5fc27f0e9d 100644 > > --- a/arch/arm64/kvm/hyp_trace.c > > +++ b/arch/arm64/kvm/hyp_trace.c > > @@ -4,15 +4,133 @@ > > * Author: Vincent Donnefort > > */ > > > > +#include > > #include > > +#include > > #include > > > > +#include > > #include > > #include > > #include > > > > #include "hyp_trace.h" > > > > +/* Same 10min used by clocksource when width is more than 32-bits */ > > +#define CLOCK_MAX_CONVERSION_S 600 > > +/* > > + * Time to give for the clock init. Long enough to get a good mult/shift > > + * estimation. Short enough to not delay the tracing start too much. > > + */ > > +#define CLOCK_INIT_MS 100 > > +/* > > + * Time between clock checks. Must be small enough to catch clock deviation when > > + * it is still tiny. > > + */ > > +#define CLOCK_UPDATE_MS 500 > > If these definitions are common, can't we reuse the existing ones? > Specially given that this isn't EL2 code. Only the first is reused but it doesn't exist any definition for it. > > Thanks, > > M. > > -- > Without deviation from the norm, progress is not possible.