From: Peng Fan <peng.fan@oss.nxp.com>
To: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Cc: Abel Vesa <abelvesa@kernel.org>, Peng Fan <peng.fan@nxp.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>,
Anson Huang <anson.huang@nxp.com>, Bai Ping <ping.bai@nxp.com>,
linux-clk@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@puri.sm
Subject: Re: [PATCH] clk: imx8mq: Correct the CSI PHY sels
Date: Wed, 28 Jan 2026 13:56:25 +0800 [thread overview]
Message-ID: <aXmlCbEUsqZEDYNP@shlinux89> (raw)
In-Reply-To: <20260128-imx8mq-csi-clk-v1-1-ac028ed26e8c@puri.sm>
On Wed, Jan 28, 2026 at 12:47:21AM +0100, Sebastian Krzyszkowiak wrote:
>According to i.MX 8M Quad Reference Manual (Section 5.1.2 Table 5-1)
>MIPI_CSI1_PHY_REF_CLK_ROOT and MIPI_CSI2_PHY_REF_CLK_ROOT have
>SYSTEM_PLL2_DIV3 available as their second source, which corresponds
>to sys2_pll_333m rather than sys2_pll_125m.
>
>Fixes: b80522040cd3 ("clk: imx: Add clock driver for i.MX8MQ CCM")
>Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Thanks for the fix.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
next prev parent reply other threads:[~2026-01-28 5:56 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-27 23:47 [PATCH] clk: imx8mq: Correct the CSI PHY sels Sebastian Krzyszkowiak
2026-01-28 3:39 ` Peng Fan
2026-01-28 4:50 ` Jacky Bai
2026-01-28 5:56 ` Peng Fan [this message]
2026-03-18 15:39 ` Abel Vesa
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