From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A3DF42D46D9 for ; Wed, 28 Jan 2026 13:41:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769607701; cv=none; b=Aaa3iXj5OcltQZD3VpBQUGZIUY8j+DxEkq+MYigxqF+qI9Qjj/gL1GBqlE/Ps83AtvzpACWLujfH1njSZCeL+iD079+ng6qnevkpdXmtz3QNM4gtkvXBz3YytMjoMLtnemhORhCe4GAgRMwyVuNPVQo3daMRnlexJtP2mRZ6hns= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769607701; c=relaxed/simple; bh=sy0wFhR28gWnca/IRLcrmbkTRJy8lsod1niAXHHJl2A=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=To/x5oDK0P9z998n7s7qJEHUahyhTJTotpFWdbqHJ9goOFLT83QS1T8It+4ZsLRafaVb5YrqVk5rmiKp7hP5lQKYeKgBgsfrbNJHYVvG+SuAxz7ekvJ8siq3nie8OBwl4+6tw2xYEsbuRBHZtW8Fc4TWNYdR91bvZNr/NZXIywI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 37A981515 for ; Wed, 28 Jan 2026 05:41:31 -0800 (PST) Received: from [192.168.0.1] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7B4393F73F for ; Wed, 28 Jan 2026 05:41:37 -0800 (PST) Date: Wed, 28 Jan 2026 13:39:56 +0000 From: Liviu Dudau To: Caterina Shablia Cc: David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , kernel@collabora.com, Boris Brezillon , Steven Price , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] drm: add ARM interleaved 64k modifier Message-ID: References: <20260127110740.473562-1-caterina.shablia@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260127110740.473562-1-caterina.shablia@collabora.com> On Tue, Jan 27, 2026 at 11:07:39AM +0000, Caterina Shablia wrote: > This modifier is primarily intended to be used by panvk to implement > sparse partially-resident images with better map and unmap > performance, and no worse access performance, compared to > implementing them in terms of U-interleaved. > > With this modifier, the plane is divided into 64k byte 1:1 or 2:1 > -sided tiles. The 64k tiles are laid out linearly. Each 64k tile > is divided into blocks of 16x16 texel blocks each, which themselves > are laid out linearly within a 64k tile. Then within each such > 16x16 block, texel blocks are laid out according to U order, > similar to 16X16_BLOCK_U_INTERLEAVED. > > Unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not depend on > whether a format is compressed or not. > > The hardware features corresponding to this modifier are available > starting with v10 (second gen Valhall.) > > The corresponding panvk MR can be found at: > https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38986 > > Previous patch: > https://lists.freedesktop.org/archives/dri-devel/2026-January/546655.html > > Changes since v1: > > * Rewrite the description of the modifier to be hopefully unambiguous. > > Signed-off-by: Caterina Shablia Reviewed-by: Liviu Dudau Best regards, Liviu > --- > include/uapi/drm/drm_fourcc.h | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index e527b24bd824..452f901513ad 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -1422,6 +1422,22 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > #define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \ > DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL) > > +/* > + * ARM 64k interleaved modifier > + * > + * This is used by ARM Mali v10+ GPUs. With this modifier, the plane is divided > + * into 64k byte 1:1 or 2:1 -sided tiles. The 64k tiles are laid out linearly. > + * Each 64k tile is divided into blocks of 16x16 texel blocks, which are > + * themselves laid out linearly within a 64k tile. Then within each 16x16 > + * block, texel blocks are laid out according to U order, similar to > + * 16X16_BLOCK_U_INTERLEAVED. > + * > + * Note that unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not change > + * depending on whether a format is compressed or not. > + */ > +#define DRM_FORMAT_MOD_ARM_INTERLEAVED_64K \ > + DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 2ULL) > + > /* > * Allwinner tiled modifier > * > > base-commit: f08f665f8cda9520d98ee24545d306a92f386616 > -- > 2.47.3 >