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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-59e5f568d95sm961995e87.30.2026.02.12.05.49.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Feb 2026 05:49:35 -0800 (PST) Date: Thu, 12 Feb 2026 14:49:34 +0100 From: Marcus Folkesson To: Wolfram Sang , Peter Rosin , Michael Hennerich , Bartosz Golaszewski , Andi Shyti , Bartosz Golaszewski Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 0/5] I2C Mux per channel bus speed Message-ID: References: <20260128-i2c-mux-v4-0-dee49ce276c0@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="2rS0NZa0G0VvGsej" Content-Disposition: inline In-Reply-To: <20260128-i2c-mux-v4-0-dee49ce276c0@gmail.com> --2rS0NZa0G0VvGsej Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jan 28, 2026 at 10:54:26AM +0100, Marcus Folkesson wrote: > This was a RFC on how to implement a feature to have different bus > speeds on different channels with an I2C multiplexer/switch. > As no major complaints on the design came up during the review, I > decided to submit the series without the RFC tag. >=20 > The benefit with this feature is that you may group devices after > the fastest bus speed they can handle. > A real-world example is that you could have e.g. a display running @400kHz > and a smart battery running @100kHz using the same I2C controller. >=20 > There are many corner cases where this may cause a problem for some > hardware topologies. I've tried to describe those I could think of > in the documentation, see Patch #5. >=20 > E.g. one risk is that if the mux driver does not disconnect channels > when Idle, this may cause a higher frequency to "leak" through to > devices that are supposed to run at lower bus speed. > This is not only a "problem" for changing bus speed but could also be > an issue for potential address conflicts. >=20 > This patchset has been used and tested heavily the last months > on a custom board based on a da850 (DaVinci) platform. >=20 > The implementation is split up into several patches: >=20 > Patch #1 Introduce a callback for the i2c controller to set bus speed > Patch #2 Introduce functionality to adjust bus speed depending on mux > channel. > Patch #3 Cleanup i2c-davinci driver a bit to prepare it for set_clk_freq > Parch #4 Implement set_clk_freq for the i2c-davinci driver > Parch #5 Update documentation with this feature >=20 > Signed-off-by: Marcus Folkesson Hi all, A friently reminder to everyone out there who might be able to review this patchset. The patches has been tested and used for a long time on a custom board, so I feel quite confident with the implementation. It also should not affect existing code that not make use of the new feature. But it needs reviews. Thank you in advance Best regards, Marcus Folkesson --2rS0NZa0G0VvGsej Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEEBVGi6LZstU1kwSxliIBOb1ldUjIFAmmN2mgACgkQiIBOb1ld UjJyyA/8DQfVswJwLs4RPMdXzmUPcI98CHFFZ+0g2p3hplUpfq27qmT6pENvo0PF vsx3QLtpxTWAdSTRwjRda6sW+11AVYLb4PxjJ6KKsAQH6EO6Yht+HwPhjh+2L2D5 fjsMk7DkVL4pHnJj64UP5bHr3MxyTVM/7olk7M7g3Gbj2Qge0IeKVNn/i/AvM1yl jOAYKEcAFXX0ZofMaJ3L/irlGqV/NwfNWbOXt6ztY0XzK30EWU5CLbY43QBUCNUQ 8HbzbuoarlXoesg33sZnuoFl6rCJIkF4wow99ssbdLMQq/NSXlUdzn611kdBXgiy ts7iESn/P/tQ45QyzyjksSssHHU9hN3U0NdAx4dRekcJIB0cP07t8wDXIByEK7ig yRu43LdaGU8vGYyWh3salssI4aHyetyS/p00CWS4ww05X9IKVMNtIFDTm6Tt6ydL OIi+ORTZjMifI+n5VSKEZZOZO9q7vhB1320W55FP/cPDkqGzKC1xOkXwl3OLyT1t C32MkUJ3ywBKJZders6aGgjUHGmXr0flLCeYrZOHSDQoxIeTaPRU0TRh2DxMTBHb dcAj0DpCVM8egl6P21MmLgqx2lHEBIwIpdJG/CipdnpRigDjTD++i/4g478KSuYE tPU73QKRL3OWKwHIExyMQIn2SjjdySAOpakgzKXRd4jSdJPIjNA= =d6VN -----END PGP SIGNATURE----- --2rS0NZa0G0VvGsej--