From: Niklas Cassel <cassel@kernel.org>
To: Aksh Garg <a-garg7@ti.com>
Cc: linux-pci@vger.kernel.org, jingoohan1@gmail.com, mani@kernel.org,
lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org,
bhelgaas@google.com, yoshihiro.shimoda.uh@renesas.com,
fancer.lancer@gmail.com, Zhiqiang.Hou@nxp.com,
gustavo.pimentel@synopsys.com, linux-kernel@vger.kernel.org,
s-vadapalli@ti.com, danishanwar@ti.com
Subject: Re: [PATCH 1/2] PCI: dwc: ep: Fix MSI-X configuration to write to correct physical function
Date: Mon, 2 Feb 2026 08:55:46 +0100 [thread overview]
Message-ID: <aYBYgrM6SPWQy6iP@ryzen> (raw)
In-Reply-To: <20260202072758.101845-2-a-garg7@ti.com>
On Mon, Feb 02, 2026 at 12:57:57PM +0530, Aksh Garg wrote:
> The MSI-X configuration code reads from the correct physical function's
> register space using dw_pcie_ep_readw_dbi(), but writes back only to
> PF0 using the old dw_pcie_writew_dbi() helper. This causes incorrect
> MSI-X configuration for other PFs.
>
> Fix this by using dw_pcie_ep_writew_dbi() to write to the correct PF's
> register space, matching the read operation.
>
> Fixes: 70fa02ca1446 ("PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers")
> Signed-off-by: Aksh Garg <a-garg7@ti.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 7e7844ff0f7e..771241e1a2c9 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -745,7 +745,7 @@ static int dw_pcie_ep_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> val = dw_pcie_ep_readw_dbi(ep, func_no, reg);
> val &= ~PCI_MSIX_FLAGS_QSIZE;
> val |= nr_irqs - 1; /* encoded as N-1 */
> - dw_pcie_writew_dbi(pci, reg, val);
> + dw_pcie_ep_writew_dbi(ep, func_no, reg, val);
>
> reg = ep_func->msix_cap + PCI_MSIX_TABLE;
> val = offset | bir;
> --
> 2.34.1
>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
However, please also fix the only remaining place in this file which still
uses the incorrect dw_pcie_writew_dbi() instead of dw_pcie_ep_writew_dbi()
i.e.:
dw_pcie_ep_raise_msix_irq_doorbell().
next prev parent reply other threads:[~2026-02-02 7:55 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 7:27 [PATCH 0/2] PCI: dwc: ep: Multi-function endpoint configuration fixes Aksh Garg
2026-02-02 7:27 ` [PATCH 1/2] PCI: dwc: ep: Fix MSI-X configuration to write to correct physical function Aksh Garg
2026-02-02 7:55 ` Niklas Cassel [this message]
2026-02-02 7:57 ` Niklas Cassel
2026-02-02 8:15 ` Aksh Garg
2026-02-02 8:47 ` Niklas Cassel
2026-02-02 7:27 ` [PATCH 2/2] PCI: dwc: ep: Mirror the max link width and speed fields to all functions Aksh Garg
2026-02-18 13:38 ` Manivannan Sadhasivam
2026-02-23 18:12 ` Bjorn Helgaas
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