From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f202.google.com (mail-pg1-f202.google.com [209.85.215.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E13317736 for ; Thu, 5 Feb 2026 18:16:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.202 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770315367; cv=none; b=imYHTB5JVQcku6pLiULYfzQ6MHjJV+2u07hI+UyRVf01YK717UFCtwVqCPVB+/anvYX+V7ZsW3WzTam3nSdssrI77yjFVuh3WTgwuZjBKT2hhXukHs6izSfIY8kDD7NKTvp+5gcxkge2JIPR12a0tl6zUF7bTkYW3x0vsl8fK6I= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770315367; c=relaxed/simple; bh=JaSiFx5tGgruRq7Qg3RAVqyVwcNl8rziDHWnfcUwWpk=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=Z2KMlxtaNr5MYDlqUw49shHvpevdpw9ZXd/XV5Chw4QO6Dj3c53MDBIkbEliC3Z5ogODXvj1SWMINVS5OuQ8A5HIhVHNt1z/EtM4UGcgEYpdjAHaVA6RfE4YeyfFSEXX/IrT0eICg0RETRUtU3sidBNuvB0dnLYbtSHVBJH/T+U= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=mN40ooNX; arc=none smtp.client-ip=209.85.215.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="mN40ooNX" Received: by mail-pg1-f202.google.com with SMTP id 41be03b00d2f7-c67e92aad79so711268a12.0 for ; Thu, 05 Feb 2026 10:16:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1770315367; x=1770920167; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=w63WtH6exvgU3XpaEY5YF/xmw4rPvTE/WzLO1Z+uiT0=; b=mN40ooNXmhao3cRSagt4b2tS8rAftuf/qZbjBeCP0sZc+TcAJJ3r+dzj2zrB1XF6G/ 1RZ/dpoegkaBzCCEDCwIlgpi17hPJ9TSUTqOatZ9i37uh/rwSdyHz12s5S/2XcrQ1/yy aMAd6LHxSaZ3MaoTl8AvzxRSPqyZ8ZVGK3S6oL4EW/EZ8Dj8BUNWyWj6DomjPVOZRfMK cMu9Mclyn6olt5/+3GkeDnM/v7KQC2uBrbEZthNcz71ItwpVYFImNLtUFMuf+ld6cs7R 8UBjN99FbGKsh5FCyqZXj01D5F3H+fqAQWFFbSTsyWG+A80UuTkI19kj6s9W8dKabudM iTUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770315367; x=1770920167; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=w63WtH6exvgU3XpaEY5YF/xmw4rPvTE/WzLO1Z+uiT0=; b=buEOJkQLar8/aDGxz5YFysONfnzHZ4S5fJ4rF9lzggkxPuHkK6l7P6QNXgT1y6/KAO 10DQ+N9lo87BnQWP6AzsLZxFew9624G9Qrom0aOKZpNKa3HdLr71My35B9njS6eAccqL MQhzqBSEGk3Xs6VB4OtAWSEvZwwmw9nZhCVGXR1Lny50DCtg0R3im/umbth6TLGc413G LWKXm1sskmZC5cqJjNA1vRhf6DUk9abPYkzerZiJw+MSwsSibETeX97mFUxW5ZkUkX6c aIzB8DCoUGanNDKDwRIx0vtqVEhWMv8TVV8o8wt4lVfyuXg1kVjJHM49OkHw9ziL7GVl 1u7A== X-Forwarded-Encrypted: i=1; AJvYcCWv8KJgZF10qbYzk0XDOo2vr5pdWTme9dgEtQjNactoXexklAcyYW9jFc/lVxGBTdAk34dzjQPzJa6Ex1E=@vger.kernel.org X-Gm-Message-State: AOJu0YxbUuFADSXKCcoYlJPb6KTbbBGDvzHusG9F8XkC2k6CWR3aQVrt DtvYZ3VYjJfxv2L+rmSuj/nYk/weBdQaO8CF7I8uz3LG9N8hpXNzhXGtYJ7HBZNVW2aijGCHZnu HKBsn5Q== X-Received: from pgqs26.prod.google.com ([2002:a65:691a:0:b0:c61:3772:dcf4]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:6d9b:b0:35f:6e12:186f with SMTP id adf61e73a8af0-393ad0016c0mr253956637.23.1770315366666; Thu, 05 Feb 2026 10:16:06 -0800 (PST) Date: Thu, 5 Feb 2026 10:16:05 -0800 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260113225406.273373-1-jmattson@google.com> Message-ID: Subject: Re: [PATCH] KVM: VMX: Add quirk to allow L1 to set FREEZE_IN_SMM in vmcs12 From: Sean Christopherson To: Jim Mattson Cc: Paolo Bonzini , Jonathan Corbet , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Maxim Levitsky , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Thu, Feb 05, 2026, Jim Mattson wrote: > On Thu, Feb 5, 2026 at 6:47=E2=80=AFAM Sean Christopherson wrote: > > > > In other words, unless I'm missing something, the only reasonable o= ption is to > > > > run the guest with FREEZE_IN_SMM=3D1, which means ignoring the gues= t's wishes. > > > > Or I guess another way to look at it: you can have any color car yo= u want, as > > > > long as it's black :-) > > > > > > I would be happy with FREEZE_IN_SMM=3D1. I'm not happy with the host > > > dictating FREEZE_IN_SMM=3D0. > > > > Yep, make sense. >=20 > Perhaps we should ignore both L0 and L1, and arbitrarily set > FREEZE_IN_SMM=3D1 for both vmcs01 and vmcs02 when MPT is enabled.=20 Hmm, I like that idea even more, because it's waaay simpler to implement. = Argh, the wrinkle is that KVM doesn't actually know if DEBUGCTLMSR_FREEZE_IN_SMM = is supported. Oh, nice, it's reported in PERF_CAPABILITIES. IA32_DEBUGCTL.FREEZE_WHILE_SMM is supported if IA32_PERF_CAPABILITIES.FREEZE_WHILE_SMM[Bit 12] is reporting 1 Arguably, this is a fix for mediated PMU support. Because as you pointed o= ut, we can freeze PMCs on SMI for mediated vPMUs without impacting host profili= ng, unlike the legacy vCPU where it being a weird extension of perf means we ca= n't deny guest profiling without breaking host perf usage. This? (untested) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-in= dex.h index 4d3566bb1a93..5563f68158bb 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -324,6 +324,7 @@ #define PERF_CAP_PEBS_TRAP BIT_ULL(6) #define PERF_CAP_ARCH_REG BIT_ULL(7) #define PERF_CAP_PEBS_FORMAT 0xf00 +#define PERF_CAP_FREEZE_IN_SMM BIT_ULL(12) #define PERF_CAP_FW_WRITES BIT_ULL(13) #define PERF_CAP_PEBS_BASELINE BIT_ULL(14) #define PERF_CAP_PEBS_TIMING_INFO BIT_ULL(17) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 27acafd03381..ef0d8108ff42 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -8119,13 +8119,12 @@ void vmx_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu= ) static __init u64 vmx_get_perf_capabilities(void) { u64 perf_cap =3D PERF_CAP_FW_WRITES; - u64 host_perf_cap =3D 0; =20 if (!enable_pmu) return 0; =20 if (boot_cpu_has(X86_FEATURE_PDCM)) - rdmsrq(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); + rdmsrq(MSR_IA32_PERF_CAPABILITIES, kvm_host.perf_capabiliti= es); =20 if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR) && !enable_mediated_pmu) { @@ -8139,11 +8138,11 @@ static __init u64 vmx_get_perf_capabilities(void) if (!vmx_lbr_caps.has_callstack) memset(&vmx_lbr_caps, 0, sizeof(vmx_lbr_caps)); else if (vmx_lbr_caps.nr) - perf_cap |=3D host_perf_cap & PERF_CAP_LBR_FMT; + perf_cap |=3D kvm_host.perf_capabilities & PERF_CAP= _LBR_FMT; } =20 if (vmx_pebs_supported()) { - perf_cap |=3D host_perf_cap & PERF_CAP_PEBS_MASK; + perf_cap |=3D kvm_host.perf_capabilities & PERF_CAP_PEBS_MA= SK; =20 /* * Disallow adaptive PEBS as it is functionally broken, can= be diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index 70bfe81dea54..e780d0e06b61 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -408,6 +408,11 @@ static inline void vmx_guest_debugctl_write(struct kvm= _vcpu *vcpu, u64 val) WARN_ON_ONCE(val & VMX_HOST_OWNED_DEBUGCTL_BITS); =20 val |=3D vcpu->arch.host_debugctl & VMX_HOST_OWNED_DEBUGCTL_BITS; + + if (kvm_vcpu_has_mediated_pmu(vcpu) && + (kvm_host.perf_capabilities & PERF_CAP_FREEZE_IN_SMM)) + val |=3D DEBUGCTLMSR_FREEZE_IN_SMM; + vmcs_write64(GUEST_IA32_DEBUGCTL, val); } =20 diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index 70e81f008030..e0084e1063d0 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -52,6 +52,7 @@ struct kvm_host_values { u64 xss; u64 s_cet; u64 arch_capabilities; + u64 perf_capabilities; }; =20 void kvm_spurious_fault(void);