From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E417D2ECD3A for ; Fri, 6 Feb 2026 18:17:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.73 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770401852; cv=none; b=aOG2qtcSo09HKLqviVWttd2bEx8NSOCGrDu1ZNDEmYtoWtYdbcyEM2NDmHJTrZl7Z8/d7FkUw0gu1SuWJMyQN0+aMM+GjQ0dMVhqP2TJ4AXjaZrp/NeQhsQ0zaYK+l5t8vfA9vDlDscgkMj53FpLxZ5NhTQmBYVJtQasVRKT/CI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770401852; c=relaxed/simple; bh=o9DVE8NnlcwxZ80p5OOZls7WtX2Ykerdk1S8OIhGkt4=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=StdXzWaeS0yKjlIDJIMVMku1QRtnKgNgkA6qOzNpH/TqaT+yShONCy6Ucg7jvEq2APzJ6Rmti+9LnNuKnqTKYMhJBL9cpWZODJOsKGHeqiOfwW1elPcbl3gb3uBmo2WGqdtMpIoVWWlSiUNztnAunzV2fW9TQoxVBhLv9peOaL0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=P0z9Ljh2; arc=none smtp.client-ip=209.85.216.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="P0z9Ljh2" Received: by mail-pj1-f73.google.com with SMTP id 98e67ed59e1d1-34c7d0c5ed2so2081469a91.0 for ; Fri, 06 Feb 2026 10:17:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1770401851; x=1771006651; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=CFM7idE3qyCCU0QQUYowTjRBvFMJAa3MGc8Bb8NjCyI=; b=P0z9Ljh2ep7gtd8MnTVzGoO0j6A9CUP7HuDcXT3HDIpQwvS2pYa5rUlH5mzpcH3ul2 ubhJfHrThJ/CKRmZQ9Y9hTbhgcOh08dS0GQiWnfKRXzqS18/9cLiY17dlP2q3HsQlQ79 zB+yXK5SyQ1vIyccc3o2o4XOFW8qsMpD5f1FuLbBiPsDh6HrAnm6+SGlnZ0igIEubLAK Dj5NqgUAqcFeOHuEndeAVO1rvNCkM8DWjL6M5uQtZC/0jrcq33KN64qrSRdrOzUskO4M HCc2a/GMfx11HBEjWFNnTttaBO12FIpM6Ro5IQlO1JwZJOxVp7hXTllMhC7mj/ZkcFRZ /0yQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770401851; x=1771006651; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=CFM7idE3qyCCU0QQUYowTjRBvFMJAa3MGc8Bb8NjCyI=; b=PGlBovvk8rOWa0caQPCvXMJ5nv+pNd/+EGHUGO93xcHuu55CJ77+QyLgRopfFZZcde BDdvwLgzrdkgyRSrzwGZz03L8xtXqOVe6usJRjOIqOP7EEQKFHCtWQ98fMAb7JX1P6w2 izlMeCstkYI1AbEz+GT70mbNAtmG8YNoIFFJjRuqbRkI/f3iWToDQX5XmKhL+EjqX99T sxMppk6Zs/B0tCzgRSJZ1EH9xMc1Y1/ddznL1zJl2dh3TiO6VVJY4vPWkhg2Bfu3sGN4 jtv3ookEGOMKuFFcnuzYNdE3xfpuYyBgjc+FSMwgoCsHKQ0jIRzQxP35BxqiqWk2Gcow RTJA== X-Forwarded-Encrypted: i=1; AJvYcCUWbdt+l5G9dG/9ypomjBNgp8931PIjyj40axLXW2fn96nFqWzd++VgpjxBnBj+MgtA3rkYkjusILuh0i0=@vger.kernel.org X-Gm-Message-State: AOJu0YxkvWUIF4/koZwEjZAQKpmxIQeU97aE58IAYmA69UHlmwa0k1Vy 5krsTegwYCpq9hy+S47IFGiFUli/0ng7J9JwwaQdasGEDI+jMf9/bknjkaiJiYxJxdJPfWYt+Ss X11wBkg== X-Received: from pjbhg13.prod.google.com ([2002:a17:90b:300d:b0:34a:b143:87d7]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:3c12:b0:354:be2e:c056 with SMTP id 98e67ed59e1d1-354be2ed154mr1164237a91.18.1770401851262; Fri, 06 Feb 2026 10:17:31 -0800 (PST) Date: Fri, 6 Feb 2026 10:17:29 -0800 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260203190711.458413-1-seanjc@google.com> <20260203190711.458413-2-seanjc@google.com> Message-ID: Subject: Re: [PATCH 1/2] KVM: SVM: Initialize AVIC VMCB fields if AVIC is enabled with in-kernel APIC From: Sean Christopherson To: Naveen N Rao Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Jim Mattson , "Maciej S . Szmigiero" Content-Type: text/plain; charset="us-ascii" On Fri, Feb 06, 2026, Naveen N Rao wrote: > On Tue, Feb 03, 2026 at 11:07:09AM -0800, Sean Christopherson wrote: > > Initialize all per-vCPU AVIC control fields in the VMCB if AVIC is enabled > > in KVM and the VM has an in-kernel local APIC, i.e. if it's _possible_ the > > vCPU could activate AVIC at any point in its lifecycle. Configuring the > > VMCB if and only if AVIC is active "works" purely because of optimizations > > in kvm_create_lapic() to speculatively set apicv_active if AVIC is enabled > > *and* to defer updates until the first KVM_RUN. In quotes because KVM > > I think it will be good to clarify that two issues are being addressed > here (it wasn't clear to me to begin with): > - One, described above, is about calling into avic_init_vmcb() > regardless of the vCPU APICv status. > - Two, described below is about using the vCPU APICv status for init and > not consulting the VM-level APICv inhibit status. Yeah, I was worried the changelog didn't capture the second one well, but I was struggling to come up with wording. How about this as a penultimate paragraph? Note! Use the vCPU's current APICv status when initializing the VMCB, not the VM-level inhibit status. The state of the VMCB *must* be kept consistent with the vCPU's APICv status at all times (KVM elides updates that are supposed be nops). If the vCPU's APICv status isn't up-to-date with the VM-level status, then there is guaranteed to be a pending KVM_REQ_APICV_UPDATE, i.e. KVM will sync the vCPU with the VM before entering the guest. > > likely won't do the right thing if kvm_apicv_activated() is false, i.e. if > > a vCPU is created while APICv is inhibited at the VM level for whatever > > reason. E.g. if the inhibit is *removed* before KVM_REQ_APICV_UPDATE is > > handled in KVM_RUN, then __kvm_vcpu_update_apicv() will elide calls to > > vendor code due to seeing "apicv_active == activate". > > > > Cleaning up the initialization code will also allow fixing a bug where KVM > > incorrectly leaves CR8 interception enabled when AVIC is activated without > > creating a mess with respect to whether AVIC is activated or not. > > > > Cc: stable@vger.kernel.org > > Signed-off-by: Sean Christopherson > > Any reason not to add a Fixes: tag? Purely that I couldn't pin down exactly what commit(s) to blame. Well, that's a bit of a lie. If I'm being 100% truthful, I got as far as commit 67034bb9dd5e and decided I didn't care enough to spend the effort to figure out whether or not that commit was truly to blame :-) > It looks like the below commits are to blame, but those are really old so I > understand if you don't think this is useful: > Fixes: 67034bb9dd5e ("KVM: SVM: Add irqchip_split() checks before enabling AVIC") > Fixes: 6c3e4422dd20 ("svm: Add support for dynamic APICv") LGTM, I'll tack them on. > Other than that: > Reviewed-by: Naveen N Rao (AMD) Thanks! (Seriously, I really appreciate the in-depth reviews) > > --- > > arch/x86/kvm/svm/avic.c | 2 +- > > arch/x86/kvm/svm/svm.c | 2 +- > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c > > index f92214b1a938..44e07c27b190 100644 > > --- a/arch/x86/kvm/svm/avic.c > > +++ b/arch/x86/kvm/svm/avic.c > > @@ -368,7 +368,7 @@ void avic_init_vmcb(struct vcpu_svm *svm, struct vmcb *vmcb) > > vmcb->control.avic_physical_id = __sme_set(__pa(kvm_svm->avic_physical_id_table)); > > vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE; > > > > - if (kvm_apicv_activated(svm->vcpu.kvm)) > > + if (kvm_vcpu_apicv_active(&svm->vcpu)) > > avic_activate_vmcb(svm); > > else > > avic_deactivate_vmcb(svm); > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > > index 5f0136dbdde6..e8313fdc5465 100644 > > --- a/arch/x86/kvm/svm/svm.c > > +++ b/arch/x86/kvm/svm/svm.c > > @@ -1189,7 +1189,7 @@ static void init_vmcb(struct kvm_vcpu *vcpu, bool init_event) > > if (guest_cpu_cap_has(vcpu, X86_FEATURE_ERAPS)) > > svm->vmcb->control.erap_ctl |= ERAP_CONTROL_ALLOW_LARGER_RAP; > > > > - if (kvm_vcpu_apicv_active(vcpu)) > > + if (enable_apicv && irqchip_in_kernel(vcpu->kvm)) > > avic_init_vmcb(svm, vmcb); > > Doesn't have to be done as part of this series, but I'm wondering if it > makes sense to turn this into a helper to clarify the intent and to make > it more obvious: Hmm, yeah, though my only hesitation is the name. For whatever reason, "possible" makes me think "is APICv possible *right now*" (ignoring that I wrote exactly that in the changelog). What if we go with kvm_can_use_apicv()? That would align with vmx_can_use_ipiv() and vmx_can_use_vtd_pi(), which are pretty much identical in concept.