From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f201.google.com (mail-pg1-f201.google.com [209.85.215.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C1522D8764 for ; Fri, 6 Feb 2026 23:18:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419883; cv=none; b=oL2glfJWvrCpx+fHW90odUOcnfA7pCjzqP8Bn4oQc1u1+18VEm9fEosBEEGcEkU2UuNqhGWLiXPZBlNGX9j+DDo6NN7QIlFNvfmrrpTgkDXCOaszpr2k7sPc92PZLrqo8j5mkYzCv6v9FVIGnIwmi3cgI0DZ87sPV97+QG83IFM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770419883; c=relaxed/simple; bh=vC+UzOiNSw7Ep+RaYvzyF57/776KykC+Gx/GSex0hQA=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=raBmjWLUwGuqWsZmAfjVBym6jD9jo9MFOg+af8OyIwWIhuvhDTFnX0VJyNFenzab3xerjKHa013hooZCYV6xlkjzjOz5N5XPzP2qmRF4ZqbzMZpW9dGuy1EOax1bqHDb1glrVIfUO3UqCtibHniCxpMB762AOmuAt7JdKjgVtcc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=xCaLJMZL; arc=none smtp.client-ip=209.85.215.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="xCaLJMZL" Received: by mail-pg1-f201.google.com with SMTP id 41be03b00d2f7-b630b4d8d52so764572a12.3 for ; Fri, 06 Feb 2026 15:18:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1770419883; x=1771024683; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=iVZvicGY3dplrb5J2oNrXVVT3pZgPh6D3oyNVxQfbJc=; b=xCaLJMZLVV0GdEPrNz6y8QCH5ySwiUi6zT3lAsAZTEsO8S43ugG16CSJZq0+Ea0Xnu 7FfJrZAkAAfn5fpS58+fHnRuCxQ4/HaMdo5QncpnpkDepHP+N/GIn5oei0AvET0SaBX8 rhcXTQkQm4nlGeyUGSFtVqIwKSCVXfmTOy31Se/x6ixUbvO3ERY6Fn8yZMv0PJ/F48uL rE+Qxlk7epFf32QHZ1lGoIU3rraREPVy0yHG8mMKvmL54h0z2W3fKxbWHraAGSwRi/NV DgVDUfPrC6r4LxF/vix4W2FJcGxjm8k6sJ26cqpzOwRCACQPLZzXWx7SPQWt4Gbe2vc6 ZrBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770419883; x=1771024683; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=iVZvicGY3dplrb5J2oNrXVVT3pZgPh6D3oyNVxQfbJc=; b=hEYstEa5R+Bad5xKHBFjpiM7tvQsOHejip9NwXh4jWN10rvLCXgU4Df0JLLH57B5lx Rg3bzUFF8hSHyhTGVb1mrJDLYuEXfzmgHx6jKu1rie2e5yN/L/LLU8jZHxVMCSIfGqgz 3UH7eYrcQU0yvB0d23HkYsnc91wkdHFBtaySokKWIDvyMUW9iTwQXz6QvMqXuRLAzqDx v5v5fLPWdd12ReOSgVvIgZYgqXMDH5V7yA6FZxQOy/wqT23LDzKHr/NBEeQJJC72iUQb jzlVDQjWY1pira3REvpe07ePO5P0e0IUgBnXZHNXcFNPghwHF0Kj+r+PGq6SS5LbQkmb DUpw== X-Forwarded-Encrypted: i=1; AJvYcCXBMYr1HlAtg++t+GMGNSsQkrcRAVd3z1cQQZ4WVWu+iY5xBa9WEB+WguxrBtsMj73iFYi+hdg4WM8/4vE=@vger.kernel.org X-Gm-Message-State: AOJu0YzrLtgo9zMNLgcO++FRVncTj0gvNqmur2WBSNn7sTM4O8uVSLbn h9soIs4o+6AwH7AoMToQycukbY24xCzm7VIAOaC+i1h8Nx/MeAqYxfwYPDdTBJ3zKe8lCBtDQBg sy1Ir9g== X-Received: from pglr14.prod.google.com ([2002:a63:514e:0:b0:c61:3a0e:23ea]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:7001:b0:38b:e9eb:b12b with SMTP id adf61e73a8af0-393ad33a87bmr4315678637.41.1770419882896; Fri, 06 Feb 2026 15:18:02 -0800 (PST) Date: Fri, 6 Feb 2026 15:18:01 -0800 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260129011517.3545883-1-seanjc@google.com> <20260129011517.3545883-23-seanjc@google.com> Message-ID: Subject: Re: [RFC PATCH v5 22/45] KVM: TDX: Get/put PAMT pages when (un)mapping private memory From: Sean Christopherson To: Rick P Edgecombe Cc: Yan Y Zhao , "kvm@vger.kernel.org" , "linux-coco@lists.linux.dev" , Xiaoyao Li , Kai Huang , "dave.hansen@linux.intel.com" , "kas@kernel.org" , "binbin.wu@linux.intel.com" , "mingo@redhat.com" , "pbonzini@redhat.com" , "ackerleytng@google.com" , "linux-kernel@vger.kernel.org" , Isaku Yamahata , "sagis@google.com" , "tglx@kernel.org" , "bp@alien8.de" , Vishal Annapurve , "x86@kernel.org" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Fri, Feb 06, 2026, Rick P Edgecombe wrote: > On Fri, 2026-02-06 at 08:03 -0800, Sean Christopherson wrote: > > > If this external cache is for PAMT pages allocation for guest pages o= nly, > > > here > > > the min count should be 1 instead of PT64_ROOT_MAX_LEVEL? > >=20 > > Oh!=C2=A0 Right.=C2=A0 Hmm, with that in mind, it seems like topup_exte= rnal_cache() > > isn't > > quite the right interace.=C2=A0 It's not at all clear that, unlike the = other > > caches, > > the DPAMT cache isn't tied to the page tables, it's tied to the physica= l > > memory > > being mapped into the guest. > >=20 > > At the very least, it seems like we should drop the @min parameter? > >=20 > > int (*topup_external_cache)(struct kvm *kvm, struct kvm_vcpu *vcpu); > >=20 > > Though if someone has a name that better captures what the cache is use= d for, > > without bleeding too many details into common x86... >=20 > From the TDX perspective we have 4 types of pages that are needed to serv= ice > faults: > 1. "Control pages" (i.e. external page tables themselves) > 2. Private guest memory pages > 3. DPAMT backing pages for control pages > 4. DPAMT backing pages for private pages >=20 > (3) is totally hidden now, but we need a hook to allocate (4). But from c= ore > MMU's perspective we hide the existence of DPAMT backing pages. So we don= 't want > to leak that concept. Heh, there is no way around that. Common KVM needs to know that the cache = is tied to mapping a page into the guest, otherwise the parameters don't make = any sense whatsoever. All we can do is minimize the bleeding. > The page we need is kind of like something to "prepare" the private page = before > installing it. It actually isn't that related to the mirror/external conc= ept. So > if we separate it from "external" and make it about installing private gu= est > memory, it fits better conceptually I think. But it could be a bit confus= ing for > other types of VMs who have to trace to see if anything special is happen= ing > inside the op for their private memory. In that case it could be: >=20 > (*topup_private_mem_prepare_cache)(struct kvm_vcpu *vcpu) topup + prepare is redundant and confusing. > The core MMU doesn't know about DPAMT backing pages, but it does know abo= ut the > set_external_spte op that consumes this cache. So how about the slightly > misleading: >=20 > (*topup_set_external_spte_cache)(struct kvm_vcpu *vcpu) I really, really, want to avoid "SPTE", because the cache isn't for the SPT= E in any way, it's for the memory that's _pointed_ at by the SPTE. And the conf= usion is exactly what prompted this thread: I forgot that it's not every SPTE in = the chain that needs DPAMT backing, it's only the page that's being mapped into= the guest. How about? (*topup_private_mapping_cache) Because it's not just "private memory" it's specifically the mapping. E.g.= for the hugepage split case, the primary memory is already assigned and mapped = into the guest, but a topup is still needed because KVM is creating a new/differ= ent mapping. > It is easier for other VM types to ignore, and not that semantically wron= g from > what is happening on the TDX side.