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Tue, 24 Feb 2026 05:16:11 +0000 Date: Tue, 24 Feb 2026 13:15:57 +0800 From: Chao Gao To: "Huang, Kai" CC: "kvm@vger.kernel.org" , "linux-coco@lists.linux.dev" , "linux-kernel@vger.kernel.org" , "x86@kernel.org" , "dave.hansen@linux.intel.com" , "tony.lindgren@linux.intel.com" , "binbin.wu@linux.intel.com" , "seanjc@google.com" , "kas@kernel.org" , "Chatre, Reinette" , "Verma, Vishal L" , "nik.borisov@suse.com" , "mingo@redhat.com" , "Weiny, Ira" , "hpa@zytor.com" , "Annapurve, Vishal" , "sagis@google.com" , "Duan, Zhenzhong" , "Edgecombe, Rick P" , "paulmck@kernel.org" , "tglx@kernel.org" , "yilun.xu@linux.intel.com" , "Williams, Dan J" , "bp@alien8.de" Subject: Re: [PATCH v4 10/24] x86/virt/seamldr: Allocate and populate a module update request Message-ID: References: <20260212143606.534586-1-chao.gao@intel.com> <20260212143606.534586-11-chao.gao@intel.com> <1aa733f9066dd85c1d4f880c5c48b40c76d518c7.camel@intel.com> Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1aa733f9066dd85c1d4f880c5c48b40c76d518c7.camel@intel.com> X-ClientProxiedBy: SI2PR01CA0011.apcprd01.prod.exchangelabs.com (2603:1096:4:191::6) To CH3PR11MB8660.namprd11.prod.outlook.com (2603:10b6:610:1ce::13) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PR11MB8660:EE_|MW3PR11MB4650:EE_ X-MS-Office365-Filtering-Correlation-Id: cda15884-fe4b-484f-b2fd-08de7363d2ea X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|366016; 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This structure contains physical addresses pointing to >> the module binary and its signature file (or sigstruct), along with an >> update scenario field. >> >> TDX Modules are distributed in the tdx_blob format defined at [1]. A >> tdx_blob contains a header, sigstruct, and module binary. This is also >> the format supplied by the userspace to the kernel. >> >> Parse the tdx_blob format and populate a SEAMLDR_PARAMS structure >> accordingly. This structure will be passed to P-SEAMLDR to initiate the >> update. >> >> Note that the sigstruct_pa field in SEAMLDR_PARAMS has been extended to >> a 4-element array. The updated "SEAM Loader (SEAMLDR) Interface >> Specification" will be published separately. The kernel does not >> validate P-SEAMLDR compatibility (for example, whether it supports 4KB >> or 16KB sigstruct);  >> > >Nit: > >This sounds like the kernel can validate but chooses not to. But I thought >the fact is the kernel cannot validate because there's no P-SEAMLDR ABI to >enumerate such compatibility? Emm, the kernel could validate this by parsing mapping_file.json, but the complexity wouldn't be worth it. > >> userspace must ensure the P-SEAMLDR version is >> compatible with the selected TDX Module by checking the minimum >> P-SEAMLDR version requirements at [2]. >> >> Signed-off-by: Chao Gao >> Reviewed-by: Tony Lindgren >> Link: https://github.com/intel/confidential-computing.tdx.tdx-module.binaries/blob/main/blob_structure.txt # [1] >> Link: https://github.com/intel/confidential-computing.tdx.tdx-module.binaries/blob/main/mapping_file.json # [2] >> > >Nit: > >As mentioned in v3, can the link be considered as "stable", e.g., won't >disappear couple of years later? I'm not sure when this link will be outdated, but we'll definitely have a TDX Module release repository with a blob_structure.txt file describing the format. > >Not sure we should just have a documentation patch for 'tdx_blob' layout. I >suspect the content won't be changed in the future anyway, at least for >foreseeable future, given you have already updated the sigstruct part. > >We can include the links to the actual doc too, and if necessarily, point >out the links may get updated in the future. We can actually update the >links if they are in some doc. Regarding the documentation patch, I don't see the value in adding one. It would just mirror the code and become outdated when 'tdx_blob' layout is updated. If the concern is that tdx_blob layout changes could cause incompatibilities, that's not the kernel's responsibility to prevent; the kernel has no control over external format changes. If the issue is simply that links may become outdated, that's a common problem. We can address this by referring to blob_structure.txt in the "Intel TDX Module Binaries Repository" and dropping the specific link. For example: TDX Modules are distributed in the tdx_blob format defined in blob_structure.txt from the "Intel TDX Module Binaries Repository". A tdx_blob contains a header, sigstruct, and module binary. This is also the format supplied by the userspace to the kernel. > >[...] > >> +/* >> + * Intel TDX Module blob. Its format is defined at: >> + * https://github.com/intel/tdx-module-binaries/blob/main/blob_structure.txt I will drop this link as well. >> + * >> + * Note this structure differs from the reference above: the two variable-length >> + * fields "@sigstruct" and "@module" are represented as a single "@data" field >> + * here and split programmatically using the offset_of_module value. >> + */ >> +struct tdx_blob { >> + u16 version; >> + u16 checksum; >> + u32 offset_of_module; >> + u8 signature[8]; >> + u32 length; >> + u32 resv0; >> + u64 resv1[509]; >> + u8 data[]; >> +} __packed; > >Nit: > >It appeared you said you will s/resv/rsvd in v3. > >I don't quite mind if other people are fine with 'resv'. Or you can spell >out 'reserved' in full to match the one in 'struct seamldr_params' above. Sorry, I missed this feedback. I'll use "reserved". I even updated "len" to "length" and changed the index to start from 0 (to match blob_structure.txt) but somehow missed updating "resv."