From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f201.google.com (mail-pl1-f201.google.com [209.85.214.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 581062C0F91 for ; Tue, 24 Feb 2026 18:20:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771957227; cv=none; b=sKEn8wvInEdpn3MitvMG55gx9be09QMloOC4LLSiAdUEoCtldnE15wNoUWOEjZwxiZFi2+HRrzPHXPdgPn1iFLiZ0txX5bH7p85hXOxRnD6RfuHlDwcmMu1GqtTjuJ+UuCxMMYhRNDMr3L24jK5Gfi4ImWdPRDOefn1pR+H57Mg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771957227; c=relaxed/simple; bh=6HBIbz1MIHxgv47f23pkLD3mpNvQPB8Pf233Cy+qpbI=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=Hg9ygp1IIx0GbpOT5Iln67DZ6RVTb8YZamTFPBsrMO0vnqOEvSYSJhxJm1R7TXbkSpYNt1+Cx4MtBlUCVc8zfRCDA6rv1Im7FCBcQbbnRtNfsn4U5VhLJOwy0KW13IpJkds8K2nkYTNPL0n/FE6spW0ums1MCHAISmETo8AJjCA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=jbk9WMnX; arc=none smtp.client-ip=209.85.214.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="jbk9WMnX" Received: by mail-pl1-f201.google.com with SMTP id d9443c01a7336-2aadeb3dee4so438099985ad.2 for ; Tue, 24 Feb 2026 10:20:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1771957226; x=1772562026; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=XPIHlG6KtLJYesq6Mh62LHbWNEo//7J55cZVZpHo2WQ=; b=jbk9WMnXeZKwYpTD4Rmto/OgrR90S1QYFk9KPfqe8iU0p2fr2D3QuSr3YT/ZWxnaIT l6od1qQtKwsVpbepzjpI+nf722Indm2goMGEgEHp7Vu12d07P3HJCW9tVJs4KckFxR4e 3xFkZgXPrgaXZ9IJCdm2HQAcPKqO3YKXboLOnux5UgZCzQYBjTkUxBYg6qQou7XCx4Rc L3/FPYF88UmbNnBOU5C5RSZCb5esgM0NAp5hlSaKbZrzXqQ6fXGbsv2sbUdCIzKrPdum 9/YfaZ/gfsb81qhwC0UC24RaTiW85OZVgHMYeVNczSODfKRmW28gZ5DwZ1Kfhfgi83a2 eVvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771957226; x=1772562026; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=XPIHlG6KtLJYesq6Mh62LHbWNEo//7J55cZVZpHo2WQ=; b=pbv/x99iEd7LGOydCDB0/tM1k70CQAMeDsmDj3efOPffy80anxPnxJJxrjuR3dR6k6 zPopNlc80PWQd4pv5Q5fYCIq983sGMeDRGo8VW3T0orH4npN0q/195HMy5Olp+WatjMr reCT8z6SBA5oqiXO6gtc2mRm6YTCu6T2CXCCfMNUs2e2XRLQmT3JnWX1IT5RuDjaLn3f 1YCFPLzOu9PzHuErQez9ggN+0J12brlKyxhwuLUWsvwFOZVTZOOCpG4XEak8wWHoXT3f IDI+uXUN6t0DmDfv4Gq46BZfO8KPw3sE3TZodEyzEDxpb/EY6+TKCCXnUTxhi7l2yWxU nugg== X-Forwarded-Encrypted: i=1; AJvYcCUmOAjyUu3W86J7AOVFgrDRK9ij2O8pD6lr/y1WTqACz6MlMPIGZEx6WyTMqP2sxscCq2NeOXO3PSMAmfw=@vger.kernel.org X-Gm-Message-State: AOJu0YxCYq3cIUkSw2kLro3jvx06l979e1A1z5Sft61YvunkbPQfgAt1 mfKUGaJ0P5UzP84iXfJpxewxSttGvaBLB0wbYQ2qmOhvr2q4rkVvaCfS+UcYJucqdZk9or6d0BV diMlJHA== X-Received: from plbw5.prod.google.com ([2002:a17:902:d3c5:b0:2ad:555b:cb2b]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:1212:b0:2a0:cccf:9d24 with SMTP id d9443c01a7336-2ad744280cfmr117088455ad.16.1771957225490; Tue, 24 Feb 2026 10:20:25 -0800 (PST) Date: Tue, 24 Feb 2026 10:20:23 -0800 In-Reply-To: <20260223215118.2154194-2-bvanassche@acm.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260223215118.2154194-1-bvanassche@acm.org> <20260223215118.2154194-2-bvanassche@acm.org> Message-ID: Subject: Re: [PATCH 01/62] kvm: Make pi_enable_wakeup_handler() easier to analyze From: Sean Christopherson To: Bart Van Assche Cc: Peter Zijlstra , Ingo Molnar , Will Deacon , Boqun Feng , Waiman Long , linux-kernel@vger.kernel.org, Marco Elver , Christoph Hellwig , Steven Rostedt , Nick Desaulniers , Nathan Chancellor , Kees Cook , Jann Horn , Paolo Bonzini , kvm@vger.kernel.org Content-Type: text/plain; charset="us-ascii" For the scope, please use: KVM: VMX: On Mon, Feb 23, 2026, Bart Van Assche wrote: > The Clang thread-safety analyzer does not support comparing expressions > that use per_cpu(). Hence introduce a new local variable to capture the > address of a per-cpu spinlock. This patch prepares for enabling the > Clang thread-safety analyzer. > > Cc: Sean Christopherson > Cc: Paolo Bonzini > Cc: kvm@vger.kernel.org > Signed-off-by: Bart Van Assche > --- > arch/x86/kvm/vmx/posted_intr.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c > index 4a6d9a17da23..f8711b7b85a8 100644 > --- a/arch/x86/kvm/vmx/posted_intr.c > +++ b/arch/x86/kvm/vmx/posted_intr.c > @@ -164,6 +164,7 @@ static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu) > struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu); > struct vcpu_vt *vt = to_vt(vcpu); > struct pi_desc old, new; > + raw_spinlock_t *wakeup_lock; > > lockdep_assert_irqs_disabled(); > > @@ -179,11 +180,11 @@ static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu) > * entirety of the sched_out critical section, i.e. the wakeup handler > * can't run while the scheduler locks are held. > */ > - raw_spin_lock_nested(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu), > - PI_LOCK_SCHED_OUT); > + wakeup_lock = &per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu); Addressing this piecemeal doesn't seem maintainable in the long term. The odds of unintentionally regressing the coverage with a cleanup are rather high. Or we'll end up with confused and/or grumpy developers because they're required to write code in a very specific way because of what are effectively shortcomings in the compiler. > + raw_spin_lock_nested(wakeup_lock, PI_LOCK_SCHED_OUT); > list_add_tail(&vt->pi_wakeup_list, > &per_cpu(wakeup_vcpus_on_cpu, vcpu->cpu)); > - raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu)); > + raw_spin_unlock(wakeup_lock); > > WARN(pi_test_sn(pi_desc), "PI descriptor SN field set before blocking"); >