From: Drew Fustini <fustini@kernel.org>
To: yunhui cui <cuiyunhui@bytedance.com>
Cc: "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Adrien Ricciardi" <aricciardi@baylibre.com>,
"Nicolas Pitre" <npitre@baylibre.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Atish Patra" <atish.patra@linux.dev>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Ved Shanbhogue" <ved@rivosinc.com>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Weiwei Li" <liwei1518@gmail.com>,
guo.wenjia23@zte.com.cn, liu.qingtao2@zte.com.cn,
"Reinette Chatre" <reinette.chatre@intel.com>,
"Tony Luck" <tony.luck@intel.com>,
"Babu Moger" <babu.moger@amd.com>,
"Peter Newman" <peternewman@google.com>,
"Fenghua Yu" <fenghua.yu@intel.com>,
"James Morse" <james.morse@arm.com>,
"Ben Horgan" <ben.horgan@arm.com>,
"Dave Martin" <Dave.Martin@arm.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
x86@kernel.org, "Rob Herring" <robh@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Sunil V L" <sunilvl@ventanamicro.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev,
devicetree@vger.kernel.org
Subject: Re: [External] [PATCH RFC v2 08/17] RISC-V: QoS: add resctrl interface for CBQRI controllers
Date: Fri, 20 Feb 2026 11:54:56 -0800 [thread overview]
Message-ID: <aZi8ED8pzmSZEuUX@x1> (raw)
In-Reply-To: <CAEEQ3wn1zQfn3wD-D6tz5OQjk+7ZucwyKrPHD9wP=kDDj+3XGg@mail.gmail.com>
On Mon, Feb 02, 2026 at 12:12:28PM +0800, yunhui cui wrote:
> Hi Drew,
Hi, thanks for your review, sorry I had this reply in draft for awhile
and failed to actually send it. All good points from you and I've been
working on fixing up the code.
> On Thu, Jan 29, 2026 at 4:28 AM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Add interface for CBQRI controller drivers to make use of the resctrl
> > filesystem.
> >
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > arch/riscv/kernel/qos/qos_resctrl.c | 1192 +++++++++++++++++++++++++++++++++++
> > 1 file changed, 1192 insertions(+)
> >
> > diff --git a/arch/riscv/kernel/qos/qos_resctrl.c b/arch/riscv/kernel/qos/qos_resctrl.c
> > new file mode 100644
> > index 000000000000..d500098599d2
> > --- /dev/null
> > +++ b/arch/riscv/kernel/qos/qos_resctrl.c
> > @@ -0,0 +1,1192 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +
> > +#define pr_fmt(fmt) "qos: resctrl: " fmt
> > +
> > +#include <linux/slab.h>
> > +#include <linux/err.h>
> > +#include <linux/riscv_qos.h>
> > +#include <linux/resctrl.h>
> > +#include <linux/types.h>
> > +#include <asm/csr.h>
> > +#include <asm/qos.h>
> > +#include "internal.h"
> > +
> > +#define MAX_CONTROLLERS 6
> > +static struct cbqri_controller controllers[MAX_CONTROLLERS];
>
> Switch to dynamic allocation? Remove MAX_CONTROLLERS.
Yes, I am reworking the implementation to dynamically allocate the
cbqri_controller array based on the number of controllers actually in
the system.
> > +int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
> > + u32 closid, u32 rmid, enum resctrl_event_id eventid,
> > + u64 *val, void *arch_mon_ctx)
> > +{
> > + /*
> > + * The current Qemu implementation of CBQRI capacity and bandwidth
> > + * controllers do not emulate the utilization of resources over
> > + * time. Therefore, Qemu currently sets the invalid bit in
> > + * cc_mon_ctr_val and bc_mon_ctr_val, and there is no meaningful
> > + * value other than 0 to return for reading an RMID (e.g. MCID in
> > + * CBQRI terminology)
> > + */
> > +
> > + return 0;
>
> Implement per the spec's description directly, not as this comment states?
Good point that this should actually perform the operation to read the
value, even if Qemu is just setting the invalid bit as there is no real
value implemented in Qemu.
> > +/*
> > + * Note: for the purposes of the CBQRI proof-of-concept, debug logging
> > + * has been left in this function that detects the properties of CBQRI
> > + * capable controllers in the system. pr_info calls would be removed
> > + * before submitting non-RFC patches.
> > + */
> > +static int cbqri_probe_controller(struct cbqri_controller_info *ctrl_info,
> > + struct cbqri_controller *ctrl)
> > +{
> > + int err = 0, status;
> > + u64 reg;
> > +
> > + pr_info("controller info: type=%d addr=0x%lx size=%lu max-rcid=%u max-mcid=%u",
> > + ctrl_info->type, ctrl_info->addr, ctrl_info->size,
> > + ctrl_info->rcid_count, ctrl_info->mcid_count);
> > +
> > + /* max_rmid is used by resctrl_arch_system_num_rmid_idx() */
> > + max_rmid = ctrl_info->mcid_count;
>
> Get the min of all controllers?
Yes, I will change the logic to do that.
> > +static int qos_init_domain_ctrlval(struct rdt_resource *r, struct rdt_ctrl_domain *d)
> > +{
> > + struct cbqri_resctrl_res *hw_res;
> > + struct cbqri_resctrl_dom *hw_dom;
> > + u64 *dc;
> > + int err = 0;
> > + int i;
> > +
> > + hw_res = container_of(r, struct cbqri_resctrl_res, resctrl_res);
> > + if (!hw_res)
> > + return -ENOMEM;
> > +
> > + hw_dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom);
> > + if (!hw_dom)
> > + return -ENOMEM;
> > +
> > + dc = kmalloc_array(hw_res->max_rcid, sizeof(*hw_dom->ctrl_val),
> > + GFP_KERNEL);
> > + if (!dc)
> > + return -ENOMEM;
> > +
> > + hw_dom->ctrl_val = dc;
> > +
> > + for (i = 0; i < hw_res->max_rcid; i++, dc++) {
> > + err = resctrl_arch_update_one(r, d, i, 0, resctrl_get_default_ctrl(r));
> > + if (err)
> > + return 0;
>
> return 0 ?
Ah, yes, I will update to return error instead of silencing it.
> > +static int qos_resctrl_add_controller_domain(struct cbqri_controller *ctrl, int *id)
> > +{
> > + struct rdt_ctrl_domain *domain = NULL;
> > + struct cbqri_resctrl_res *cbqri_res = NULL;
> > + struct rdt_resource *res = NULL;
> > + int internal_id = *id;
> > + int err = 0;
> > +
> > + domain = qos_new_domain(ctrl);
> > + if (!domain)
> > + return -ENOSPC;
> > + if (ctrl->ctrl_info->type == CBQRI_CONTROLLER_TYPE_CAPACITY) {
> > + cpumask_copy(&domain->hdr.cpu_mask, &ctrl->ctrl_info->cache.cpu_mask);
> > + if (ctrl->ctrl_info->cache.cache_level == 2) {
> > + cbqri_res = &cbqri_resctrl_resources[RDT_RESOURCE_L2];
> > + cbqri_res->max_rcid = ctrl->ctrl_info->rcid_count;
> > + cbqri_res->max_mcid = ctrl->ctrl_info->mcid_count;
> > + res = &cbqri_res->resctrl_res;
> > + res->mon.num_rmid = ctrl->ctrl_info->mcid_count;
> > + res->rid = RDT_RESOURCE_L2;
> > + res->name = "L2";
> > + res->alloc_capable = ctrl->alloc_capable;
> > + res->mon_capable = ctrl->mon_capable;
> > + res->schema_fmt = RESCTRL_SCHEMA_BITMAP;
> > + res->ctrl_scope = RESCTRL_L2_CACHE;
> > + res->cache.arch_has_sparse_bitmasks = false;
> > + res->cache.arch_has_per_cpu_cfg = false;
> > + res->cache.cbm_len = ctrl->cc.ncblks;
> > + res->cache.shareable_bits = resctrl_get_default_ctrl(res);
> > + res->cache.min_cbm_bits = 1;
> > + } else if (ctrl->ctrl_info->cache.cache_level == 3) {
> > + cbqri_res = &cbqri_resctrl_resources[RDT_RESOURCE_L3];
> > + cbqri_res->max_rcid = ctrl->ctrl_info->rcid_count;
> > + cbqri_res->max_mcid = ctrl->ctrl_info->mcid_count;
> > + res = &cbqri_res->resctrl_res;
> > + res->mon.num_rmid = ctrl->ctrl_info->mcid_count;
> > + res->rid = RDT_RESOURCE_L3;
> > + res->name = "L3";
> > + res->schema_fmt = RESCTRL_SCHEMA_BITMAP;
> > + res->ctrl_scope = RESCTRL_L3_CACHE;
> > + res->alloc_capable = ctrl->alloc_capable;
> > + res->mon_capable = ctrl->mon_capable;
> > + res->cache.arch_has_sparse_bitmasks = false;
> > + res->cache.arch_has_per_cpu_cfg = false;
> > + res->cache.cbm_len = ctrl->cc.ncblks;
> > + res->cache.shareable_bits = resctrl_get_default_ctrl(res);
> > + res->cache.min_cbm_bits = 1;
> > + } else {
> > + pr_warn("%s(): unknown cache level %d", __func__,
> > + ctrl->ctrl_info->cache.cache_level);
> > + err = -ENODEV;
> > + goto err_free_domain;
> > + }
> > + } else if (ctrl->ctrl_info->type == CBQRI_CONTROLLER_TYPE_BANDWIDTH) {
> > + if (ctrl->alloc_capable) {
> > + cbqri_res = &cbqri_resctrl_resources[RDT_RESOURCE_MBA];
> > + cbqri_res->max_rcid = ctrl->ctrl_info->rcid_count;
> > + cbqri_res->max_mcid = ctrl->ctrl_info->mcid_count;
> > + res = &cbqri_res->resctrl_res;
> > + res->mon.num_rmid = ctrl->ctrl_info->mcid_count;
> > + res->rid = RDT_RESOURCE_MBA;
> > + res->name = "MB";
> > + res->schema_fmt = RESCTRL_SCHEMA_RANGE;
> > + res->ctrl_scope = RESCTRL_L3_CACHE;
> > + res->alloc_capable = ctrl->alloc_capable;
> > + res->mon_capable = false;
> > + res->membw.delay_linear = true;
> > + res->membw.arch_needs_linear = true;
> > + res->membw.throttle_mode = THREAD_THROTTLE_UNDEFINED;
> > + // The minimum percentage allowed by the CBQRI spec
> > + res->membw.min_bw = 1;
> > + // The maximum percentage allowed by the CBQRI spec
> > + res->membw.max_bw = 80;
> > + res->membw.bw_gran = 1;
> > + }
>
> Wrap a function.
I am guessing you mean to break up this long function into a couple of
smaller functions? I will give that a try for the next rev.
> > + } else {
> > + pr_warn("%s(): unknown resource %d", __func__, ctrl->ctrl_info->type);
> > + err = -ENODEV;
> > + goto err_free_domain;
> > + }
> > +
> > + domain->hdr.id = internal_id;
> > + err = qos_init_domain_ctrlval(res, domain);
> > + if (err)
> > + goto err_free_domain;
> > +
> > + if (cbqri_res) {
> > + list_add_tail(&domain->hdr.list, &cbqri_res->resctrl_res.ctrl_domains);
> > + *id = internal_id;
> > + err = resctrl_online_ctrl_domain(res, domain);
> > + if (err) {
> > + pr_warn("%s(): failed to online cbqri_res domain", __func__);
> > + goto err_free_domain;
> > + }
> > + }
> > +
> > + return 0;
> > +
> > +err_free_domain:
> > + pr_warn("%s(): err_free_domain", __func__);
> > + kfree(container_of(domain, struct cbqri_resctrl_dom, resctrl_ctrl_dom));
>
> free hw_dom->ctrl_val ?
I'll take a closer look at the error cleanup path and fix in the next
rev.
Thanks,
Drew
next prev parent reply other threads:[~2026-02-20 19:54 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 20:27 [PATCH RFC v2 00/17] RISC-V: QoS: add CBQRI resctrl interface Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 01/17] dt-bindings: riscv: Add Ssqosid extension description Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 02/17] RISC-V: Detect the Ssqosid extension Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 03/17] RISC-V: Add support for srmcfg CSR from Ssqosid ext Drew Fustini
2026-02-02 3:17 ` [External] " yunhui cui
2026-02-08 1:31 ` Drew Fustini
2026-02-09 3:36 ` yunhui cui
2026-02-02 4:27 ` yunhui cui
2026-02-03 19:43 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 04/17] RISC-V: QoS: define properties of CBQRI controllers Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 05/17] RISC-V: QoS: define CBQRI capacity and bandwidth capabilities Drew Fustini
2026-02-13 23:13 ` Reinette Chatre
2026-02-14 16:25 ` Drew Fustini
2026-02-17 16:32 ` Reinette Chatre
2026-02-17 18:28 ` Drew Fustini
2026-02-17 19:02 ` Reinette Chatre
2026-02-17 22:36 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 06/17] RISC-V: QoS: define CBQRI resctrl resources and domains Drew Fustini
2026-02-13 23:15 ` Reinette Chatre
2026-02-14 16:34 ` Drew Fustini
2026-03-25 2:31 ` [External] " yunhui cui
2026-03-25 6:49 ` Drew Fustini
2026-03-26 8:32 ` yunhui cui
2026-01-28 20:27 ` [PATCH RFC v2 07/17] RISC-V: QoS: define prototypes for resctrl interface Drew Fustini
2026-02-13 23:21 ` Reinette Chatre
2026-01-28 20:27 ` [PATCH RFC v2 08/17] RISC-V: QoS: add resctrl interface for CBQRI controllers Drew Fustini
2026-02-02 4:12 ` [External] " yunhui cui
2026-02-20 19:54 ` Drew Fustini [this message]
2026-02-09 7:20 ` Gong Shuai
2026-02-09 10:07 ` Gong Shuai
2026-02-09 14:16 ` Gong Shuai
2026-02-11 0:57 ` Drew Fustini
2026-02-13 23:30 ` Reinette Chatre
2026-02-18 21:49 ` Drew Fustini
2026-02-18 23:18 ` Reinette Chatre
2026-03-25 2:09 ` [External] " yunhui cui
2026-03-25 6:37 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 09/17] RISC-V: QoS: expose implementation to resctrl Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 10/17] RISC-V: QoS: add late_initcall to setup resctrl interface Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 11/17] RISC-V: QoS: add to build when CONFIG_RISCV_ISA_SSQOSID set Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 12/17] RISC-V: QoS: make CONFIG_RISCV_ISA_SSQOSID select resctrl Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 13/17] acpi: pptt: Add helper to find a cache from id Drew Fustini
2026-03-25 1:34 ` [External] " yunhui cui
2026-01-28 20:27 ` [PATCH RFC v2 14/17] include: acpi: actbl2: Add structs for RQSC table Drew Fustini
2026-01-28 20:31 ` Rafael J. Wysocki
2026-01-28 20:44 ` Drew Fustini
2026-01-28 20:50 ` Rafael J. Wysocki
2026-03-25 1:43 ` [External] " yunhui cui
2026-03-25 7:09 ` Drew Fustini
2026-03-25 1:48 ` yunhui cui
2026-03-25 7:14 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 15/17] RISC-V: QoS: add Cache ID and Prox Dom to CBQRI controllers Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 16/17] acpi: riscv: Parse RISC-V Quality of Service Controller (RQSC) table Drew Fustini
2026-02-02 11:08 ` [External] " yunhui cui
2026-02-03 20:00 ` Drew Fustini
2026-02-14 4:48 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 17/17] acpi: riscv: Add support for RISC-V Quality of Service Controller (RQSC) Drew Fustini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aZi8ED8pzmSZEuUX@x1 \
--to=fustini@kernel.org \
--cc=Dave.Martin@arm.com \
--cc=acpica-devel@lists.linux.dev \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=aricciardi@baylibre.com \
--cc=atish.patra@linux.dev \
--cc=atishp@rivosinc.com \
--cc=babu.moger@amd.com \
--cc=ben.horgan@arm.com \
--cc=conor+dt@kernel.org \
--cc=cp0613@linux.alibaba.com \
--cc=cuiyunhui@bytedance.com \
--cc=devicetree@vger.kernel.org \
--cc=fenghua.yu@intel.com \
--cc=guo.wenjia23@zte.com.cn \
--cc=james.morse@arm.com \
--cc=krzk+dt@kernel.org \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=liu.qingtao2@zte.com.cn \
--cc=liwei1518@gmail.com \
--cc=mindal@semihalf.com \
--cc=npitre@baylibre.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=peternewman@google.com \
--cc=pjw@kernel.org \
--cc=rafael@kernel.org \
--cc=reinette.chatre@intel.com \
--cc=rkrcmar@ventanamicro.com \
--cc=robert.moore@intel.com \
--cc=robh@kernel.org \
--cc=samuel.holland@sifive.com \
--cc=sunilvl@ventanamicro.com \
--cc=tony.luck@intel.com \
--cc=vasu@rivosinc.com \
--cc=ved@rivosinc.com \
--cc=x86@kernel.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox