From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from h7.fbrelay.privateemail.com (h7.fbrelay.privateemail.com [162.0.218.230]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E71A931B81C for ; Fri, 20 Feb 2026 17:38:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=162.0.218.230 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771609102; cv=none; b=CmC6V2MeDRM5mUEAKJ2fehxJ2j5SfaV94asGtet7CgCp/3rjb/c/4+Jme3+yBC+cg6Vw6+fKC22ptOqOX5DHjBFZriMnExMWEGdeESBrbDrvebtkFuQDoR5Pyk9e7Yxxy5jdrl2EhhpVrmiP7+IvszALyGYmHwAtkWT5yjjKXbc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771609102; c=relaxed/simple; bh=v9VMseWBEPgyXxhmWhon98liHOREVQ8xvu+uEeMcaWs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=q+KEIQDxDmm5/zFX8RMORQngzIzsmFkUQ/7dSSuaxNheKXx/lO6Eeiiy4PqDh/yVKYk93d/x/2P6uHHyvCUIUVmK14UVB3O5A8wgf8/mTEthdmr60dQm4DwiDosEU63MknmEtetJXRpw3VFICG2fJL5KJtmEPFJlzs1Lr31d/u0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=effective-light.com; spf=pass smtp.mailfrom=effective-light.com; arc=none smtp.client-ip=162.0.218.230 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=effective-light.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=effective-light.com Received: from MTA-11-3.privateemail.com (mta-11.privateemail.com [198.54.118.200]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by h7.fbrelay.privateemail.com (Postfix) with ESMTPSA id 4fHcsc2SsVz2xDM for ; Fri, 20 Feb 2026 12:38:12 -0500 (EST) Received: from mta-11.privateemail.com (localhost [127.0.0.1]) by mta-11.privateemail.com (Postfix) with ESMTP id 4fHcsS3YYPz3hhbj; Fri, 20 Feb 2026 12:38:04 -0500 (EST) Received: from hal-station (unknown [23.129.64.186]) by mta-11.privateemail.com (Postfix) with ESMTPA; Fri, 20 Feb 2026 12:37:33 -0500 (EST) Date: Fri, 20 Feb 2026 12:37:28 -0500 From: Hamza Mahfooz To: dri-devel@lists.freedesktop.org Cc: Michel =?iso-8859-1?Q?D=E4nzer?= , Mario Limonciello , Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , Christian =?iso-8859-1?Q?K=F6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Alex Hung , Aurabindo Pillai , Wayne Lin , Timur =?iso-8859-1?Q?Krist=F3f?= , Ivan Lipski , Dominik Kaszewski , amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/2] drm/amd/display: add vendor specific reset Message-ID: References: <20260220171518.711594-1-someguy@effective-light.com> <20260220171518.711594-2-someguy@effective-light.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260220171518.711594-2-someguy@effective-light.com> X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Feb 20, 2026 at 12:15:13PM -0500, Hamza Mahfooz wrote: > We now have a means to respond to page flip timeouts. So, hook up > support by trying to reload DMUB firmware if > drm_atomic_helper_wait_for_flip_done() fails. Also, send out a wedged > event if the firmware reload fails. > > Signed-off-by: Hamza Mahfooz > --- > v2: send a wedged event instead of attempting a GPU reset. > v3: read return value of drm_atomic_helper_wait_for_flip_done(). > v4: only send wedged event if firmware reload fails and send out "fake" > page flip completes. > --- > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +++++++++++++++++-- > 1 file changed, 22 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 7c51d8d7e73c..0ae6ada22fb0 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -87,6 +87,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -10829,6 +10830,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) > struct drm_connector_state *old_con_state = NULL, *new_con_state = NULL; > struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state; > int crtc_disable_count = 0; > + struct amdgpu_crtc *acrtc; > > trace_amdgpu_dm_atomic_commit_tail_begin(state); > > @@ -11085,8 +11087,26 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) > /* Signal HW programming completion */ > drm_atomic_helper_commit_hw_done(state); > > - if (wait_for_vblank) > - drm_atomic_helper_wait_for_flip_done(dev, state); > + if (wait_for_vblank && > + drm_atomic_helper_wait_for_flip_done(dev, state)) { > + mutex_lock(&dm->dc_lock); > + if (dm_dmub_hw_init(adev)) > + drm_dev_wedged_event(dev, DRM_WEDGE_RECOVERY_REBIND | > + DRM_WEDGE_RECOVERY_BUS_RESET, > + NULL); > + mutex_unlock(&dm->dc_lock); > + > + spin_lock_irqsave(&dev->event_lock, flags); > + drm_for_each_crtc(crtc, dev) { Whoops, sent out an older version of this patch, the following line is here as of the latest (tested) version: acrtc = to_amdgpu_crtc(crtc); > + if (acrtc->event) { > + drm_crtc_send_vblank_event(crtc, acrtc->event); > + acrtc->event = NULL; > + drm_crtc_vblank_put(crtc); > + acrtc->pflip_status = AMDGPU_FLIP_NONE; > + } > + } > + spin_unlock_irqrestore(&dev->event_lock, flags); > + } > > drm_atomic_helper_cleanup_planes(dev, state); > > -- > 2.53.0 >