From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-173.mta0.migadu.com (out-173.mta0.migadu.com [91.218.175.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 661C42BCF4C for ; Fri, 20 Feb 2026 23:27:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.173 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771630078; cv=none; b=LP9y/ePW+cNdwW8t40ULUryz6HZMuNKke3tzdq8mP5itbfBlkB7uSpAcx7p3VGJil9oCDzAIb/ZprSjGk3HXrqz+2/ZxPcFDo3vxr6mt5Dl7K6DdLTftztElv93fY9kbJ0h3Xc+4BWErGFkLIoadrU/e+/90948xsnpRest4ECg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771630078; c=relaxed/simple; bh=rv0W1GlKPsco6zAZsA9l3+64N2IAXDBJLcKfJpQi+0s=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=P447UG69rF6yI8xkeKrwY3sL5mYr/E8Rqgxan7ZeF0Ae+oR5Y5hN5aCZzDB0u6O8MC/1FLdD1oFJqzt5ETNg32T6GOhcSOlq35wl9qeYb41RvtBuiE0rEx4aWQMAsjV1LUOJwryhjI7NZJDwUhRfMEq4wq+5NCVM99U7atLue6E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=DQCaS+6/; arc=none smtp.client-ip=91.218.175.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="DQCaS+6/" Date: Fri, 20 Feb 2026 15:27:51 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1771630075; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=30uoeH+AlPDCZ37LMEKC4PrR1UY78Hb2TT9vay3KZ/8=; b=DQCaS+6/TRNwPYaxpUB+jukGRHtrwuC89qQ6d+q5RrmNF6SUeknsJxWBfB5Jwa4wwu/xBa lm502pGaTPLJv6A8xbLMlXrHFf7klFS+dTmoRfG8fAlQzdoz/dNluAMgpkzryi3jR8AwCm 7DxJsoycODfPEpSLlEo1klONvHQ4Pv8= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Shakeel Butt To: Jisheng Zhang Cc: Catalin Marinas , Will Deacon , Dennis Zhou , Tejun Heo , Christoph Lameter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: Re: [PATCH] arm64: remove HAVE_CMPXCHG_LOCAL Message-ID: References: <20260215033944.16374-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Migadu-Flow: FLOW_OUT On Fri, Feb 20, 2026 at 02:20:54PM +0800, Jisheng Zhang wrote: > On Wed, Feb 18, 2026 at 02:07:57PM -0800, Shakeel Butt wrote: > > On Sun, Feb 15, 2026 at 11:39:44AM +0800, Jisheng Zhang wrote: > > > It turns out the generic disable/enable irq this_cpu_cmpxchg > > > implementation is faster than LL/SC or lse implementation. Remove > > > HAVE_CMPXCHG_LOCAL for better performance on arm64. > > > > > > Tested on Quad 1.9GHZ CA55 platform: > > > average mod_node_page_state() cost decreases from 167ns to 103ns > > > the spawn (30 duration) benchmark in unixbench is improved > > > from 147494 lps to 150561 lps, improved by 2.1% > > > > > > Tested on Quad 2.1GHZ CA73 platform: > > > average mod_node_page_state() cost decreases from 113ns to 85ns > > > the spawn (30 duration) benchmark in unixbench is improved > > > from 209844 lps to 212581 lps, improved by 1.3% > > > > > > Signed-off-by: Jisheng Zhang > > > > Please note that mod_node_page_state() can be called in NMI context and > > generic disable/enable irq are not safe against NMIs (newer arm arch supports > > NMI). > > hmm, interesting... > > fgrep HAVE_NMI arch/*/Kconfig > then > fgrep HAVE_CMPXCHG_LOCAL arch/*/Kconfig > > shows that only x86, arm64, s390 and loongarch are safe, while arm, > powerpc and mips enable HAVE_NMI but missing HAVE_CMPXCHG_LOCAL, so > they rely on generic generic disable/enable irq version, so you imply > that these three arch are not safe considering mod_node_page_state() > in NMI context. Yes it seems like it. For memcg stats, we use ARCH_HAVE_NMI_SAFE_CMPXCHG and ARCH_HAS_NMI_SAFE_THIS_CPU_OPS config options to correctly handle the updates from NMI context. Maybe we need something similar for vmstat as well. So arm, powerpc and mips does not have ARCH_HAS_NMI_SAFE_THIS_CPU_OPS but powerpc does have ARCH_HAVE_NMI_SAFE_CMPXCHG and arm has it for CPU_V7, CPU_V7M & CPU_V6K models. I wonder if we need to add complexity for these archs.