Re: [PATCH v2 3/3] KVM: SVM: Advertise Translation Cache Extensions to userspace

Andrew Cooper
2026-03-07T01:55:36Z

> From: Venkatesh Srinivas <venkateshs@chromium.org>
>
> TCE augments the behavior of TLB invalidating instructions (INVLPG,
> INVLPGB, and INVPCID) to only invalidate translations for relevant
> intermediate mappings to the address range, rather than ALL intermdiate
> translations.
>
> The Linux kernel has been setting EFER.TCE if supported by the CPU since
> commit 440a65b7d25f ("x86/mm: Enable AMD translation cache extensions"),
> as it may improve performance.
>
> KVM does not need to do anything to virtualize the feature, only
> advertise it and allow setting EFER.TCE. If a TLB invalidating
> instruction is not intercepted, it will behave according to the guest's
> setting of EFER.TCE as the value will be loaded on VM-Enter. Otherwise,
> KVM's emulation may invalidate more TLB entries, which is perfectly fine
> as the CPU is allowed to invalidate more TLB entries that it strictly
> needs to.
>
> Advertise X86_FEATURE_TCE to userspace, and allow the guest to set
> EFER.TCE if available.
>
> Signed-off-by: Venkatesh Srinivas <venkateshs@chromium.org>
> Co-developed-by: Yosry Ahmed <yosry@kernel.org>
> Signed-off-by: Yosry Ahmed <yosry@kernel.org>

I'll repeat what I said on that referenced patch.

What's the point?  AMD have said that TCE doesn't exist any more; it's a
bit that's no longer wired into anything.

You've got to get to pre-Zen hardware before this has any behavioural
effect, at which point the breath of testing is almost 0.

~Andrew