Re: [PATCH 6/8] dmaengine: ti: New driver for K3 BCDMA_V2

kernel test robot
2025-05-07T07:31:49Z

Hi Sai,

kernel test robot noticed the following build warnings:

[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on linus/master v6.15-rc5]
[cannot apply to next-20250506]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Sai-Sree-Kartheek-Adivi/dt-bindings-dma-ti-Add-document-for-K3-BCDMA-V2/20250428-152616
base: https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
patch link: https://lore.kernel.org/r/20250428072032.946008-7-s-adivi%40ti.com
patch subject: [PATCH 6/8] dmaengine: ti: New driver for K3 BCDMA_V2
config: arm64-allmodconfig (https://download.01.org/0day-ci/archive/20250507/202505071527.yZZNwWXf-lkp@intel.com/config)
compiler: clang version 19.1.7 (https://github.com/llvm/llvm-project cd708029e0b2869e80abe31ddb175f7c35361f90)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250507/202505071527.yZZNwWXf-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505071527.yZZNwWXf-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/dma/ti/k3-udma-v2.c:147:14: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
147 | int status, ret;
| ^
>> drivers/dma/ti/k3-udma-v2.c:1042:6: warning: variable 'cap2' set but not used [-Wunused-but-set-variable]
1042 | u32 cap2, cap3;
| ^
>> drivers/dma/ti/k3-udma-v2.c:1042:12: warning: variable 'cap3' set but not used [-Wunused-but-set-variable]
1042 | u32 cap2, cap3;
| ^
3 warnings generated.

vim +/ret +147 drivers/dma/ti/k3-udma-v2.c

142
143 static int udma_v2_start(struct udma_chan *uc)
144 {
145 struct virt_dma_desc *vd = vchan_next_desc(&uc->vc);
146 struct udma_dev *ud = uc->ud;
> 147 int status, ret;
148
149 if (!vd) {
150 uc->desc = NULL;
151 return -ENOENT;
152 }
153
154 list_del(&vd->node);
155
156 uc->desc = to_udma_desc(&vd->tx);
157
158 /* Channel is already running and does not need reconfiguration */
159 if (udma_is_chan_running(uc) && !udma_chan_needs_reconfiguration(uc)) {
160 udma_start_desc(uc);
161 goto out;
162 }
163
164 /* Make sure that we clear the teardown bit, if it is set */
165 ud->udma_reset_chan(uc, false);
166
167 /* Push descriptors before we start the channel */
168 udma_start_desc(uc);
169
170 switch (uc->desc->dir) {
171 case DMA_DEV_TO_MEM:
172 /* Config remote TR */
173 if (uc->config.ep_type == PSIL_EP_PDMA_XY) {
174 u32 val = PDMA_STATIC_TR_Y(uc->desc->static_tr.elcnt) |
175 PDMA_STATIC_TR_X(uc->desc->static_tr.elsize);
176 const struct udma_match_data *match_data =
177 uc->ud->match_data;
178
179 if (uc->config.enable_acc32)
180 val |= PDMA_STATIC_TR_XY_ACC32;
181 if (uc->config.enable_burst)
182 val |= PDMA_STATIC_TR_XY_BURST;
183
184 udma_chanrt_write(uc,
185 UDMA_CHAN_RT_STATIC_TR_XY_REG,
186 val);
187
188 udma_chanrt_write(uc,
189 UDMA_CHAN_RT_STATIC_TR_Z_REG,
190 PDMA_STATIC_TR_Z(uc->desc->static_tr.bstcnt,
191 match_data->statictr_z_mask));
192
193 /* save the current staticTR configuration */
194 memcpy(&uc->static_tr, &uc->desc->static_tr,
195 sizeof(uc->static_tr));
196 }
197
198 udma_chanrt_write(uc, UDMA_CHAN_RT_CTL_REG,
199 UDMA_CHAN_RT_CTL_EN | UDMA_CHAN_RT_CTL_AUTOPAIR);
200
201 /* Poll for autopair completion */
202 ret = read_poll_timeout_atomic(udma_v2_check_chan_autopair_completion,
203 status, status != 0, 100, 500, false, uc);
204
205 if (status <= 0)
206 return -ETIMEDOUT;
207
208 break;
209 case DMA_MEM_TO_DEV:
210 /* Config remote TR */
211 if (uc->config.ep_type == PSIL_EP_PDMA_XY) {
212 u32 val = PDMA_STATIC_TR_Y(uc->desc->static_tr.elcnt) |
213 PDMA_STATIC_TR_X(uc->desc->static_tr.elsize);
214
215 if (uc->config.enable_acc32)
216 val |= PDMA_STATIC_TR_XY_ACC32;
217 if (uc->config.enable_burst)
218 val |= PDMA_STATIC_TR_XY_BURST;
219
220 udma_chanrt_write(uc,
221 UDMA_CHAN_RT_STATIC_TR_XY_REG,
222 val);
223
224 /* save the current staticTR configuration */
225 memcpy(&uc->static_tr, &uc->desc->static_tr,
226 sizeof(uc->static_tr));
227 }
228
229 udma_chanrt_write(uc, UDMA_CHAN_RT_CTL_REG,
230 UDMA_CHAN_RT_CTL_EN | UDMA_CHAN_RT_CTL_AUTOPAIR);
231
232 /* Poll for autopair completion */
233 ret = read_poll_timeout_atomic(udma_v2_check_chan_autopair_completion,
234 status, status != 0, 100, 500, false, uc);
235
236 if (status <= 0)
237 return -ETIMEDOUT;
238
239 break;
240 case DMA_MEM_TO_MEM:
241 udma_bchanrt_write(uc, UDMA_CHAN_RT_CTL_REG,
242 UDMA_CHAN_RT_CTL_EN);
243 udma_bchanrt_write(uc, UDMA_CHAN_RT_CTL_REG,
244 UDMA_CHAN_RT_CTL_EN);
245
246 break;
247 default:
248 return -EINVAL;
249 }
250
251 uc->state = UDMA_CHAN_IS_ACTIVE;
252 out:
253
254 return 0;
255 }
256

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