Re: [PATCH 11/13] clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag

[Brian Masney <bmasney@redhat.com>]

On Fri, Feb 27, 2026 at 09:20:09AM +0100, Geert Uytterhoeven wrote:
> On Thu, 26 Feb 2026 at 19:18, Brian Masney <bmasney@redhat.com> wrote:
> > This clk driver has a noop determine_rate clk op. Drop this empty
> > function, and enable the CLK_ROUNDING_FW_MANAGED flag.
> >
> > Signed-off-by: Brian Masney <bmasney@redhat.com>
> 
> Thanks for your patch!
> 
> > --- a/drivers/clk/renesas/rzg2l-cpg.c
> > +++ b/drivers/clk/renesas/rzg2l-cpg.c
> > @@ -938,12 +938,6 @@ static unsigned long rzg2l_cpg_sipll5_recalc_rate(struct clk_hw *hw,
> >         return pll5_rate;
> >  }
> >
> > -static int rzg2l_cpg_sipll5_determine_rate(struct clk_hw *hw,
> > -                                          struct clk_rate_request *req)
> > -{
> > -       return 0;
> > -}
> > -
> >  static int rzg2l_cpg_sipll5_set_rate(struct clk_hw *hw,
> >                                      unsigned long rate,
> >                                      unsigned long parent_rate)
> > @@ -1015,7 +1009,6 @@ static int rzg2l_cpg_sipll5_set_rate(struct clk_hw *hw,
> >
> >  static const struct clk_ops rzg2l_cpg_sipll5_ops = {
> >         .recalc_rate = rzg2l_cpg_sipll5_recalc_rate,
> > -       .determine_rate = rzg2l_cpg_sipll5_determine_rate,
> >         .set_rate = rzg2l_cpg_sipll5_set_rate,
> >  };
> >
> > @@ -1041,7 +1034,7 @@ rzg2l_cpg_sipll5_register(const struct cpg_core_clk *core,
> >         init.name = core->name;
> >         parent_name = __clk_get_name(parent);
> >         init.ops = &rzg2l_cpg_sipll5_ops;
> > -       init.flags = 0;
> > +       init.flags = CLK_ROUNDING_FW_MANAGED;
> 
> Iff this is the Right Thing To Do (TM), it needs a comment, as this
> clock is not managed by firmware.

It needs a better name for the flag. I'll reply on patch 1 where more
people are CCed to see if we can come up with a better idea.

Brian