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From: Yao Zi <me@ziyao.cc>
To: Dave Hansen <dave.hansen@intel.com>,
	Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
	Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH] x86/cpu/centaur: Disable X86_FEATURE_FSGSBASE on Zhaoxin C4600
Date: Sun, 1 Mar 2026 09:10:08 +0000	[thread overview]
Message-ID: <aaQCLOMdJCWNF-dA@pie> (raw)
In-Reply-To: <72356849-27d0-46c7-b659-c1a3b260de8c@intel.com>

On Sat, Feb 28, 2026 at 04:33:18PM -0800, Dave Hansen wrote:
> On 2/28/26 09:37, Yao Zi wrote:
> > Let's disable the feature on this problematic CPU and warn the user
> > about the quirk. x86_model_id is used to match the platform to avoid
> > unexpectedly breaking other CentaurHauls cores with conflicting
> > family/model ID.
> 
> Wait a sec. There are lots of different microarchitectures with the same
> family/model and no other way to identify them but the model id string?
> 
> We've used string in a handful of places, but it's an absolute last
> resort. Are you *sure* there's no stepping or anything?

No. The commit message should be more clear, I have no clue that there
are other designs with the same family/model/stepping combination.
However, C4600 is a design from Zhaoxin instead of VIA but using
CentaurHauls as vendor ID, thus conflicts may happen since they're
different entities. So I take the safest way.

> I kinda think we should keep this like all the other vendors and keep it
> to model/family/stepping. If the vendor has grouped too many
> non-vulnerable CPUs under that, then ... this is going to be a good
> learning to bring back to the CPU design team.
> 
> If you're changing the CPU in a way that it's possible to regress
> things, you *need* to bump the model or stepping. Period. If you don't,
> the baby might get thrown out with the bathwater.
> 
> Please resend this with a normal x86_match_cpu() and x86_cpu_id[] array.

The concerns may be too farsight as there's no clue indicating conflicts
actually happened. I'll take the change in v2 if you still think it's
appropriate.

Regards,
Yao Zi

  reply	other threads:[~2026-03-01  9:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-28 17:37 [PATCH] x86/cpu/centaur: Disable X86_FEATURE_FSGSBASE on Zhaoxin C4600 Yao Zi
2026-02-28 19:06 ` Borislav Petkov
2026-03-01  9:27   ` Yao Zi
2026-03-01 18:37     ` David Laight
2026-03-02  5:09       ` Yao Zi
2026-03-01  0:33 ` Dave Hansen
2026-03-01  9:10   ` Yao Zi [this message]
2026-03-01 10:28   ` Borislav Petkov
2026-03-01 16:29 ` Andrew Cooper
2026-03-02  5:08   ` Yao Zi
2026-03-02  9:36     ` Andrew Cooper
2026-03-05  9:03 ` Tony W Wang-oc
2026-03-05 12:40   ` Andrew Cooper
2026-03-05 14:04   ` Yao Zi
2026-03-05 14:10     ` Andrew Cooper
2026-03-05 14:11   ` David Laight
2026-03-05 16:20   ` Dave Hansen
2026-03-12  2:14     ` Tony W Wang-oc
2026-03-12 15:52       ` Dave Hansen
2026-03-17  7:41         ` Tony W Wang-oc
2026-03-17 15:21           ` Dave Hansen
2026-03-18  3:44             ` Tony W Wang-oc
  -- strict thread matches above, loose matches on Subject: below --
2026-03-05 20:26 Christian Ludloff
2026-03-12  2:18 ` Tony W Wang-oc
2026-03-12 16:31   ` Christian Ludloff

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