From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5B2725A2A0; Mon, 10 Feb 2025 22:59:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739228363; cv=none; b=db7rp3uurhRUNZl4AuRPPwfCsf0H7umtgK9F9aZ5mN/RGciO3e3QixxJhLdg4rzMIdvcHujyUS0WWZAA6Cttnwk+7Vq4lfet/DVnc4tVXhUHQjrZmz3TZovRjkRWkfjWgUpAYaiRMj9Z30KM4mcrn4Ue8MFmq4Mi94EgNsuHsZk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739228363; c=relaxed/simple; bh=4BmVgtFfIJgP4OjSwUDhetxgVThq3OFA95bzZfO6Z/E=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=Zt8MMMezLfrGX52vCgthg3rJNZd4xfkhXERPEkqJieSKimrBEmZGgRG9sAFR2aMg8X7G6CMCTtp2kZnp5Rq2wyyyt2RgRZmJzumo744BNTKFlqHh1E45UT77JjdzNiEU4TS/9VqdCxP68Z5WYbiA3fmV7XpUOYULv42R/RKAw2Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Hu5BmcL6; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Hu5BmcL6" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 51AMxEhs3582864 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 10 Feb 2025 16:59:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1739228354; bh=JEXUShHNRenNyRTEL2PwMfqNH0qq/WGIeVNVkj/epB8=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=Hu5BmcL6uVX6yTdS8dbLvJBtXt+QODW9pTyD4ZE7+Cx+1m3iERba9xwjMLES2+dcg Us/nEzHo1/QYkn4Kx/DXwh4wuxVQ2mRSoSM2l0UtMeiabYePAqSDqYgD/jLy+NUb0H 1mSJhRT7FW1vnVzRjiH4s9Nw3wGz/8c1BFuVVS2s= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 51AMxExg030370 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Feb 2025 16:59:14 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 10 Feb 2025 16:59:13 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 10 Feb 2025 16:59:13 -0600 Received: from [10.249.42.149] ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 51AMxDBO029713; Mon, 10 Feb 2025 16:59:13 -0600 Message-ID: Date: Mon, 10 Feb 2025 16:59:13 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 05/10] arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors To: Judith Mendez , Nishanth Menon , Vignesh Raghavendra CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Hari Nagalla References: <20250210221530.1234009-1-jm@ti.com> <20250210221530.1234009-6-jm@ti.com> Content-Language: en-US From: Andrew Davis In-Reply-To: <20250210221530.1234009-6-jm@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea On 2/10/25 4:15 PM, Judith Mendez wrote: > From: Devarsh Thakkar > > For each remote proc, reserve memory for IPC and bind the mailbox > assignments. Two memory regions are reserved for each remote processor. > The first region of 1MB of memory is used for Vring shared buffers > and the second region is used as external memory to the remote processor > for the resource table and for tracebuffer allocations. > > Signed-off-by: Devarsh Thakkar > Signed-off-by: Hari Nagalla > Signed-off-by: Judith Mendez > --- Acked-by: Andrew Davis > Changes since v4: > - Add "status = okay" for mailbox nodes at the board level, disabling of > mailbox nodes in voltage domain .dtsi files will come in a separate > series > --- > arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 96 +++++++++++++++++++++++-- > 1 file changed, 90 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > index a6f0d87a50d8a..ac67c51caa211 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > @@ -49,6 +49,42 @@ linux,cma { > linux,cma-default; > }; > > + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99800000 0x00 0x100000>; > + no-map; > + }; > + > + c7x_0_memory_region: c7x-memory@99900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99900000 0x00 0xf00000>; > + no-map; > + }; > + > + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b800000 0x00 0x100000>; > + no-map; > + }; > + > + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b900000 0x00 0xf00000>; > + no-map; > + }; > + > + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c800000 0x00 0x100000>; > + no-map; > + }; > + > + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c900000 0x00 0x1e00000>; > + no-map; > + }; > + > secure_tfa_ddr: tfa@9e780000 { > reg = <0x00 0x9e780000 0x00 0x80000>; > alignment = <0x1000>; > @@ -60,12 +96,6 @@ secure_ddr: optee@9e800000 { > alignment = <0x1000>; > no-map; > }; > - > - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { > - compatible = "shared-dma-pool"; > - reg = <0x00 0x9c900000 0x00 0x01e00000>; > - no-map; > - }; > }; > > opp-table { > @@ -737,3 +767,57 @@ dpi1_out: endpoint { > }; > }; > }; > + > +&mailbox0_cluster0 { > + status = "okay"; > + > + mbox_r5_0: mbox-r5-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&mailbox0_cluster1 { > + status = "okay"; > + > + mbox_c7x_0: mbox-c7x-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&mailbox0_cluster2 { > + status = "okay"; > + > + mbox_mcu_r5_0: mbox-mcu-r5-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&wkup_r5fss0 { > + status = "okay"; > +}; > + > +&wkup_r5fss0_core0 { > + mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>; > + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, > + <&wkup_r5fss0_core0_memory_region>; > +}; > + > +&mcu_r5fss0 { > + status = "okay"; > +}; > + > +&mcu_r5fss0_core0 { > + mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; > + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, > + <&mcu_r5fss0_core0_memory_region>; > +}; > + > +&c7x_0 { > + mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; > + memory-region = <&c7x_0_dma_memory_region>, > + <&c7x_0_memory_region>; > + status = "okay"; > +};