From: Sean Christopherson <seanjc@google.com>
To: Kevin Cheng <chengkev@google.com>
Cc: Yosry Ahmed <yosry@kernel.org>,
pbonzini@redhat.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH V4 0/4] Align SVM with APM defined behaviors
Date: Tue, 3 Mar 2026 14:08:56 -0800 [thread overview]
Message-ID: <aadb-JQdbQJNvm0o@google.com> (raw)
In-Reply-To: <CAE6NW_YTqbMZgq1nEiO6XsuQPZsKd9_0DseFDStocrh-sB1TBw@mail.gmail.com>
On Tue, Mar 03, 2026, Kevin Cheng wrote:
> On Mon, Mar 2, 2026 at 7:35 PM Sean Christopherson <seanjc@google.com> wrote:
> >
> > On Mon, Mar 02, 2026, Sean Christopherson wrote:
> > > On Mon, Mar 02, 2026, Sean Christopherson wrote:
> > > > On Mon, Mar 02, 2026, Yosry Ahmed wrote:
> > > > > Also taking a step back, I am not really sure what's the right thing
> > > > > to do for Intel-compatible guests here. It also seems like even if we
> > > > > set the intercept, svm_set_gif() will clear the STGI intercept, even
> > > > > on Intel-compatible guests.
> > > > >
> > > > > Maybe we should leave that can of worms alone, go back to removing
> > > > > initializing the CLGI/STGI intercepts in init_vmcb(), and in
> > > > > svm_recalc_instruction_intercepts() set/clear these intercepts based
> > > > > on EFER.SVME alone, irrespective of Intel-compatibility?
> > > >
> > > > Ya, guest_cpuid_is_intel_compatible() should only be applied to VMLOAD/VMSAVE.
> > > > KVM intercepts VMLOAD/VMSAVE to fixup SYSENTER MSRs, not to inject #UD. I.e. KVM
> > > > is handling (the absoutely absurd) case that FMS reports an Intel CPU, but the
> > > > guest enables and uses SVM.
> > > >
> > > > /*
> > > > * Intercept VMLOAD if the vCPU model is Intel in order to emulate that
> > > > * VMLOAD drops bits 63:32 of SYSENTER (ignoring the fact that exposing
> > > > * SVM on Intel is bonkers and extremely unlikely to work).
> > > > */
> > > > if (guest_cpuid_is_intel_compatible(vcpu))
> > > > guest_cpu_cap_clear(vcpu, X86_FEATURE_V_VMSAVE_VMLOAD);
> > > >
> > > > Sorry for not catching this in previous versions.
> > >
> > > Because I got all kinds of confused trying to recall what was different between
> > > v3 and v4, I went ahead and spliced them together.
> > >
> > > Does the below look right? If so, I'll formally post just patches 1 and 3 as v5.
> > > I'll take 2 and 4 directly from here; I want to switch the ordering anyways so
> > > that the vgif movement immediately precedes the Recalc "instructions" patch.
> >
> > Actually, I partially take that back. I'm going to send a separate v5 for patch
> > 4, as there are additional cleanups that can be done related to Hyper-V stubs.
> >
>
> Gotcha, if you're sending just patch 4 as v5, then should I send
> patches 1 and 3 (with fixes) as a new series?
No need, I'll send a v5 for 1 and 3 as well.
next prev parent reply other threads:[~2026-03-03 22:08 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-28 3:33 [PATCH V4 0/4] Align SVM with APM defined behaviors Kevin Cheng
2026-02-28 3:33 ` [PATCH V4 1/4] KVM: SVM: Move STGI and CLGI intercept handling Kevin Cheng
2026-02-28 3:33 ` [PATCH V4 2/4] KVM: SVM: Inject #UD for INVLPGA if EFER.SVME=0 Kevin Cheng
2026-02-28 3:33 ` [PATCH V4 3/4] KVM: SVM: Recalc instructions intercepts when EFER.SVME is toggled Kevin Cheng
2026-02-28 3:33 ` [PATCH V4 4/4] KVM: SVM: Raise #UD if VMMCALL instruction is not intercepted Kevin Cheng
2026-03-03 2:22 ` Sean Christopherson
2026-03-03 9:36 ` Vitaly Kuznetsov
2026-03-02 16:21 ` [PATCH V4 0/4] Align SVM with APM defined behaviors Yosry Ahmed
2026-03-02 18:32 ` Sean Christopherson
2026-03-02 23:17 ` Sean Christopherson
2026-03-03 0:34 ` Sean Christopherson
2026-03-03 21:56 ` Kevin Cheng
2026-03-03 22:08 ` Sean Christopherson [this message]
2026-03-03 22:27 ` Kevin Cheng
2026-03-03 21:52 ` Kevin Cheng
2026-03-03 21:48 ` Kevin Cheng
2026-03-05 17:08 ` Sean Christopherson
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