From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f202.google.com (mail-pl1-f202.google.com [209.85.214.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE948384242 for ; Tue, 3 Mar 2026 22:08:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.202 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772575740; cv=none; b=ObxZ+bGvMYubRUULEZ3loDHzABSFLg1XGNv0MKzso0aNTRcD0NyxGmhsYJVd5AnKRtFJlN0ivoDAL067LqWVryKuW3DztM8fKdNUejVEoINpHTbfUcLTT8b14czb0iM4+ggzyXXVRb4VY0rCOUd2SEXvyEh1I+MX/NkWlvyKvoU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772575740; c=relaxed/simple; bh=Of7BTYeza07tyJCqXUipN95k452hh96VN8OAHgpIRDg=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=A7XU9vN6y4X8ipnXLT2odmTqjiouM61oHcRbn3iJLa3x6AIxVoT8A6t+56VCJndSRjxtSP+NEaIMxD3dbHRyE+aW5jzmKZdA2UEnkknpim8bL6QE7JLg1q2DmGZxx4GRMMGjMwNQRKL742k6aUuaA6syezTgf8FTGTooRC58hdw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=GtX2wovR; arc=none smtp.client-ip=209.85.214.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="GtX2wovR" Received: by mail-pl1-f202.google.com with SMTP id d9443c01a7336-2ae50463c39so25785875ad.1 for ; Tue, 03 Mar 2026 14:08:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1772575738; x=1773180538; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=zj6uWkxQBYzI6TemYHQOyFliUtyyEllmJWAoAGhyJyU=; b=GtX2wovRP/1lxYJ4KIUuiUDDox7ZjCkSBD5PE6yhe6TBbEq2aBasnHqSc9KYIdsG7B pr13GKEHFkQXo7We0eGs9zNn0QSao7oMl5BDFjEg32MN8LvFlb0UA+f8H4FwB49LLYg6 RP2RwqBtY9vo7Zzd+52yLvmDdoZyw/cN9sJX0CwyofvxL7NVpOplwhYdoAMeZwCy4SQR C1IDG/M9GXyDvA6ys9NSTimUHPtpiAjvqW4FZoaipteRhLOuotuuLpR0bJ0nTzUmXek4 BiuJJ/k2XHz6AFpwimlHoyVhMC/MsEqkV5JleAZfwwB/anRMqyoSmgemwCbIn/36zCC2 UdFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772575738; x=1773180538; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=zj6uWkxQBYzI6TemYHQOyFliUtyyEllmJWAoAGhyJyU=; b=NnKYUquYvTX5GvtzB+tSm+uW4JRjGMFvT1pg7S2QJnPFvHhlKALz6cM4KSqU3hDOX+ yjCgxbVaOyyC0iBAGFQbXEgVS91c0x8TwAlJBhFJ453rNrNSHCEIIdY60+Em3fNJSJwR M+HWQLRNmpS8V5nZ4AhQXSc5QzFY+n3MojVm2dXl0Gnv7KiyxZJV5Ry56aPPgf6mNHda eKjxK66E7JZfk8H84Gad11suaPZjk+ODHJqiMjGLxqmOYF+C8q+83VYxnUx+XTt1y/Mw NFdjz2kI728SUz3P6UIXrWDcbNrfAiz5554e9vgStYzT8n+gH3+AlALMdUVPmcxwG+oO r77A== X-Forwarded-Encrypted: i=1; AJvYcCVmJ8XvZB5wX1s7XyFWPm7ZOWoK9FDoXM3HmpcBQcMqQbNE+Fd4HkzEoKTnq7PHDNEUqrH2l8f1Fg3JSyE=@vger.kernel.org X-Gm-Message-State: AOJu0YxaKaMN5oAiqueiU5Tkz1XtEPB51bFfdDuX+fb0um3RIdcYh09A qxhxf6Q5ZyqMexCetsMZoywDSKum/mFK10bO0juY99ReCqGxhcHwGU5km5fG70tP/w3zcb4KSB+ qDLTG1Q== X-Received: from pjbgm24.prod.google.com ([2002:a17:90b:1018:b0:359:979d:cee5]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:1ccc:b0:341:c964:126c with SMTP id 98e67ed59e1d1-35965cef645mr16197271a91.34.1772575738034; Tue, 03 Mar 2026 14:08:58 -0800 (PST) Date: Tue, 3 Mar 2026 14:08:56 -0800 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260228033328.2285047-1-chengkev@google.com> Message-ID: Subject: Re: [PATCH V4 0/4] Align SVM with APM defined behaviors From: Sean Christopherson To: Kevin Cheng Cc: Yosry Ahmed , pbonzini@redhat.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Tue, Mar 03, 2026, Kevin Cheng wrote: > On Mon, Mar 2, 2026 at 7:35=E2=80=AFPM Sean Christopherson wrote: > > > > On Mon, Mar 02, 2026, Sean Christopherson wrote: > > > On Mon, Mar 02, 2026, Sean Christopherson wrote: > > > > On Mon, Mar 02, 2026, Yosry Ahmed wrote: > > > > > Also taking a step back, I am not really sure what's the right th= ing > > > > > to do for Intel-compatible guests here. It also seems like even i= f we > > > > > set the intercept, svm_set_gif() will clear the STGI intercept, e= ven > > > > > on Intel-compatible guests. > > > > > > > > > > Maybe we should leave that can of worms alone, go back to removin= g > > > > > initializing the CLGI/STGI intercepts in init_vmcb(), and in > > > > > svm_recalc_instruction_intercepts() set/clear these intercepts ba= sed > > > > > on EFER.SVME alone, irrespective of Intel-compatibility? > > > > > > > > Ya, guest_cpuid_is_intel_compatible() should only be applied to VML= OAD/VMSAVE. > > > > KVM intercepts VMLOAD/VMSAVE to fixup SYSENTER MSRs, not to inject = #UD. I.e. KVM > > > > is handling (the absoutely absurd) case that FMS reports an Intel C= PU, but the > > > > guest enables and uses SVM. > > > > > > > > /* > > > > * Intercept VMLOAD if the vCPU model is Intel in order to emul= ate that > > > > * VMLOAD drops bits 63:32 of SYSENTER (ignoring the fact that = exposing > > > > * SVM on Intel is bonkers and extremely unlikely to work). > > > > */ > > > > if (guest_cpuid_is_intel_compatible(vcpu)) > > > > guest_cpu_cap_clear(vcpu, X86_FEATURE_V_VMSAVE_VMLOAD); > > > > > > > > Sorry for not catching this in previous versions. > > > > > > Because I got all kinds of confused trying to recall what was differe= nt between > > > v3 and v4, I went ahead and spliced them together. > > > > > > Does the below look right? If so, I'll formally post just patches 1 = and 3 as v5. > > > I'll take 2 and 4 directly from here; I want to switch the ordering a= nyways so > > > that the vgif movement immediately precedes the Recalc "instructions"= patch. > > > > Actually, I partially take that back. I'm going to send a separate v5 = for patch > > 4, as there are additional cleanups that can be done related to Hyper-V= stubs. > > >=20 > Gotcha, if you're sending just patch 4 as v5, then should I send > patches 1 and 3 (with fixes) as a new series? No need, I'll send a v5 for 1 and 3 as well.