Re: [PATCH v4 3/5] memory: tegra186-emc: Support non-bpmp icc scaling

Aaron Kling
2025-12-17T20:29:52Z

On Wed, Dec 17, 2025 at 12:59 PM Jon Hunter <jonathanh@nvidia.com> wrote:
>
>
> On 17/12/2025 18:39, Aaron Kling wrote:
>
> ...
>
> > To try to move a resolution along, let me try to enumerate the issues
> > again. Again, please clarify should I have something incorrect or
> > incomplete.
> >
> > 1) The primary issue is when an old dtb is used with this commit and
> > the pcie driver is loaded. I can reproduce this issue on t186 and
> > t194. If this becomes the sole remaining blocking issue, I would like
> > for an exception to the normal rule be considered and this merged
> > anyways. Since it does not cause a boot failure and distros package a
> > new dt normally anyways. And to my knowledge, working around this
> > would involve redoing part off the icc subsystem itself, a major task
> > in comparison.
> >
> > 2) T194 is reported to have low clocks even with a new dt on the
> > Nvidia regression bench. I cannot reproduce this, even with the pcie
> > driver loaded. Can this be re-verified, please? And if it still
> > happens, can logs from the failure be made available and/or more
> > information provided as to the state of the unit? Like changes to the
> > default defconfig, modules that get loaded, etc.
>
> Can you list all the patches that need to be applied on top of the
> current -next and I will run it through our testing to make sure I have
> this correct.

This series, message id:
20251027-tegra186-icc-p2-v4-0-e4e4f57e2103@gmail.com. And the dt
series, message id:
20251021-tegra186-icc-p3-v3-0-68184ee8a89c@gmail.com. So, my build
sequence is:

git checkout next-20251217
b4 shazam 20251027-tegra186-icc-p2-v4-0-e4e4f57e2103@gmail.com
b4 shazam 20251021-tegra186-icc-p3-v3-0-68184ee8a89c@gmail.com
LLVM=1 ARCH=arm64 make defconfig
*edit .config to set CONFIG_PCIE_TEGRA194, CONFIG_PCIE_TEGRA194_HOST,
and CONFIG_PCIE_TEGRA194_EP to =y*
LLVM=1 ARCH=arm64 make olddefconfig
LLVM=1 ARCH=arm64 make -j33 Image nvidia/tegra194-p2972-0000.dtb

I then flash those with no modules, packaged with the simple ramdisk,
and I get a shell at 11.2 seconds and emc rate is 800 MHz at idle.

> > 3) Setting the max clock via debugfs fails when icc has pushed the
> > current clock higher than the requested rate. This is a logic issue
> > with all tegra emc drivers that implement dfs via icc. The suggested
> > resolutions are to leave this as is to keep consistency with the
> > existing drivers, perhaps updating all later, or to update the
> > existing implementations in a separate series, then send a new
> > revision here to match. I am personally unable to verify anything
> > older than tegra124, however.
>
> Thierry and I chatted about this last week and we feel that debugfs
> should be able to override the current configuration. So this will need
> to be addressed as well.

Alright. I will start looking at getting that logic straight, then
upload a new series for the older archs and a new revision of this.

Aaron