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From: Sasha Levin <sashal@kernel.org>
To: Matthieu Baerts <matttbe@kernel.org>
Cc: "Masami Hiramatsu (Google)" <mhiramat@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Carlos Llamas <cmllamas@google.com>,
	Luca Ceresoli <luca.ceresoli@bootlin.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] decode_stacktrace: Support caller address decoding
Date: Thu, 5 Mar 2026 15:47:23 -0500	[thread overview]
Message-ID: <aanr20_WwRhJc8v8@laps> (raw)
In-Reply-To: <7f47295b-803b-4d17-900f-8e19f2931407@kernel.org>

On Thu, Mar 05, 2026 at 06:05:59PM +0100, Matthieu Baerts wrote:
>Hi Masami,
>
>Thank you for the new version, and your previous reply!
>
>On 05/03/2026 17:52, Masami Hiramatsu (Google) wrote:
>> Add -c option to decodecall address instead of the return address.
>> With this option, it decodes the line info 1byte before the return
>> address which will be the call(branch) instruction address.
>> If the return address is a symbol address, it falls back to
>> decoding the return address.
>
>From what I got from Sasha, this "addr-1" trick seems quite common. Why
>not using this new feature by default, and having an option to disable it?

+1

>Or no option if someone can validate the new behaviour on architectures
>which have these delay slots you mentioned?

I didn't think that delay slots were an issue because architectures with delay
slots handle their stack unwinding and return address adjustment in their own
arch-specific code before it ever reaches the script.

-- 
Thanks,
Sasha

  reply	other threads:[~2026-03-05 20:47 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-05 16:52 [PATCH v2] decode_stacktrace: Support caller address decoding Masami Hiramatsu (Google)
2026-03-05 17:05 ` Matthieu Baerts
2026-03-05 20:47   ` Sasha Levin [this message]
2026-03-06  0:31     ` Masami Hiramatsu

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