Re: [PATCH 0/3] mmc: Lenovo N22 Braswell SD slot fixes

[Andy Shevchenko <andriy.shevchenko@intel.com>]

On Fri, Mar 20, 2026 at 06:55:04PM +0100, Andy Shevchenko wrote:
> On Fri, Mar 20, 2026 at 11:47:53AM -0500, Nelson Johnson wrote:
> > On Fri, Mar 20, 2026 at 8:27 AM Adrian Hunter wrote:

...

> I kinda tend to agree to make patches go in. We have tons of Bay Trail

(Same applicable to Braswell and Cherry Trail (Cherry View) devices.)

> machines from recent years and they are still supported well enough by
> vanilla kernel (thanks to Hans).
> 
> TL;DR: I can look a bit closer and review the patches.

Okay, after looking closer at them I think it feels like a hack approach
(or one that is done in a wrong place). If you read my comment on patch 3
the ACPI enumeration and PM domain is handled there. When device is present
in both PCI and ACPI in accordance with ACPI specification, if I am not
mistaken, it should extend the existing PCI capabilities. I.o.w. if any
contradictions with PCI resources or so the PCI should be taken as correct
ones.

Cam you share ACPI DSDT excerpt (from DSDT table of firmware, you can get it by
copying file from /sys/firmware/acpi/tables/DSDT and decode it with `iasl -d
DSDT`) and output of `lspci -vv -n -s $SDHCI_SLOT`? Because it might be that
the problem should be solved just by providing better fixes to GPIO detection
or so.

-- 
With Best Regards,
Andy Shevchenko