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Thu, 25 Sep 2025 03:13:11 -0700 (PDT) Message-ID: Subject: Re: [PATCH] [v2] i3c: fix big-endian FIFO transfers From: Nuno =?ISO-8859-1?Q?S=E1?= To: Arnd Bergmann , Manikanta Guntupalli , Jorge Marques , Arnd Bergmann Cc: Alexandre Belloni , Jorge Marques , Wolfram Sang , Frank Li , "linux-i3c@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "git (AMD-Xilinx)" , Michal Simek Date: Thu, 25 Sep 2025 11:13:39 +0100 In-Reply-To: <91e73a29-96e3-4a52-addb-0cb954f46c04@app.fastmail.com> References: <20250924201837.3691486-1-arnd@kernel.org> <2wtpklapw5ogsevuvk2l4ngvw7hymer2y4cc454h47u2d7tq44@4mknmpk5yzil> <37d47af4f4d5220764efc5870630fdfc1e9be2c9.camel@gmail.com> <91e73a29-96e3-4a52-addb-0cb954f46c04@app.fastmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2025-09-25 at 11:35 +0200, Arnd Bergmann wrote: > On Thu, Sep 25, 2025, at 10:58, Nuno S=C3=A1 wrote: > > On Thu, 2025-09-25 at 08:47 +0000, Guntupalli, Manikanta wrote: > > > > (AMD-Xilinx) ; Simek, Michal > > > > Subject: Re: [PATCH] [v2] i3c: fix big-endian FIFO transfers > > > > On Thu, 2025-09-25 at 07:37 +0000, Guntupalli, Manikanta wrote: > > > > > > i3c@lists.infradead.org; linux-kernel@vger.kernel.org > > > > > > Subject: Re: [PATCH] [v2] i3c: fix big-endian FIFO transfers > > > > > > On Wed, Sep 24, 2025 at 10:18:33PM +0200, Arnd Bergmann wrote: > > > >=20 > > > > I would argue that's something for callers of these functions to ca= re > > > > about. > > > If each I3C driver has to handle FIFO endianness individually, it > > > introduces > > > unnecessary duplication and overhead across drivers. Centralizing thi= s in > > > the > > > FIFO access helpers keeps the logic consistent, avoids repeated > > > boilerplate, > > > and reduces the chance of subtle bugs. > >=20 > > I mean, that's what spi and i2c drivers do already.=C2=A0With enum > > i3c_fifo_endian > > you're already forcing users to care (or know) about endianism so they = might > > as > > well just pass the data in the proper order already (not sure if it's s= uch a > > big > > 'burden'). >=20 > Can you give an example of an spi or i2c driver handles a similar > situation to the new i3c driver? As far as I can tell, swapping > the bytes in a FIFO register is very unusual for a hardware design > and probably a mistake rather than an intentional decision. >=20 I meant that i2c and spi drivers (and I meant on the device side) already a= re the ones having to care about putting the data in the proper endianism so t= hat controllers don't have to care (AFAIK). But I so see now that the above is kind of unrelated. > On the other hand, I can find drivers that are obviously wrong > on big-endian kernels, such as Tegra's i2c_writesl_vi() function > being unintentionally swapped from i2c_writesl() on big-endian. >=20 > For the i3c helper, I think Jorge's current version with my > fix should work for every normal driver, and I would not > want to make it more complicated for an obscure case. The > version for the AMD driver can just be in that driver, or > it could be a separate function name in the common header > if there is a chance we'll need it again. >=20 I do agree with the above. - Nuno S=C3=A1 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Arnd