From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C83B3CBE6C for ; Fri, 13 Mar 2026 17:15:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773422138; cv=none; b=p4caMBqNaqc0D0M9C2mU5t6mCuSDf/W/tXCSvvtYuYflamcN8EaoAf4X8KCWrE0JQknvFFFDCzfaPB1eO0oaICJXBPFG92f5j3UojnKUEdvL7tvDyB5+qag+jLOygQ6JRbsh3jYnwbQXELc84ZxrmvCWq+jn5RJMUF2NmvlvJQA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773422138; c=relaxed/simple; bh=xnV8mJU7s0sy7SBxV1Dfy3mmoFjUzDxYv/AA7IoKB9Q=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Tthj0wqDJvRG5YFZ6JU1BeR/PykHh/aya5JI2uB0DmIfr5/W5iNmAGS3tLUeYCpR6aT1lORi8/STsjH8T4b5KqzzfmC2CRoJf7R4dkJHXSEtovPO5ThAwjq7w6Ypwj4Sv6ZboSoxj3DYZYgTXvE0rzJo9BXOW0b5BXOgaHhirjc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=uz6UsjCQ; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="uz6UsjCQ" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-2aeab6ff148so3745ad.1 for ; Fri, 13 Mar 2026 10:15:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1773422135; x=1774026935; darn=vger.kernel.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=tQLmomcwIGHuwBkBk5aL5CzzrX9th7u6tDkwCmp4rSA=; b=uz6UsjCQwzclH8KzHJht1wrb6h++vN6n5hvPnUXqroBWr6FOqFHCSYqd6LERRwWKsh biPeD+SAkiXk3i/vMn4G4YVtlubazcfS8QmqLUtm8WUwBzwQwv5TJLbnASOXP5dL5EP1 wf27fHZg4fbiBZuH2z6lHAJqWOqzlHH1O8PDfvUpbZMYzWZE7V55apLf35gtGYRKEX/W R9HPLyB7cpyzhqk3Fk2BCrcIvnzjIbG6h0/K96Vvq4q+/jOxUBIUpwssvLjBY9ZkJj4i jf86mP756JWXcVpRlrWC1aFGg/sc1ETjXJs2GqWpDO27tt4OssmyobKSrYquH2cEBtIv deYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773422135; x=1774026935; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-gg:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tQLmomcwIGHuwBkBk5aL5CzzrX9th7u6tDkwCmp4rSA=; b=bX4x9s71ngViU7gZ2T26XMyLZ92ypqEZhTpMDgAH4YTFTY39u5rrsO9FYavp0m7X00 tDSvovcWothgL2kSj3dhGXMgjDwPAtwd+BoqdEg2a6ZvQjSDn2MWYkS55mjuGc9DW9dA 8n+xNilsz6Y0RzBIiSFwTAXBNlL7S6B68LeaJXhDmoYMvQUQxz24jCnNwmLzbavMjL1N jdXgQz4s8R/X2JExrf2S0mcFn94uVgrrMOZFGHbVWgVLpvwuyf6pREoLvxhWDt3D3FTo 0Zi5MTTb7NIC2Qr/8bk18pxCh3dOJ8J1eUU55gf86J23Egt9yfeZuYcCRLjLlffHtMmS goXQ== X-Forwarded-Encrypted: i=1; AJvYcCVKISP1vQzpAiw9nrihjvtOKPgFRc9/gSclJ0NINFqmLjlFxJ7QyTE/+cA3Ylyetk9/5xG422RKo7nCbso=@vger.kernel.org X-Gm-Message-State: AOJu0YyCH/a8vcBOQ+FhVdi65yKpDiEiKO5OOaEGd73eJ2KxJst9KwBL 7kSPCC1aD8RpjFbj97jBG0AyF/3ZQTCbztWKbhvg5ATWAkwxyrIIfbTr6d27AxOS9Q== X-Gm-Gg: ATEYQzztmzgm7uN5K1rsLZz/DthH6yo5ZfLdGW/Hrk8GCX5jPlKgqt5GZc2WPAVCdr2 qTrVP4Mmofg4H/oq3rl4VrBLNtAZNAypKaTkQq6DBHhR1mlWaaaY2Kydw0SKP8R3F1BSow9hZbA ZZWd8jyfjRgt0AiPl+aAmpk++98mBursRaxm1F7Nf6ERmlWskg8ilMadMgLbVHZwnc1MprbkHGu F8yp6cfRmcfJIDGouFrD3Z2v70FNp4F+1j7+Wf7zmHBlwJKusWmP6jbU3zauoWUxjP17NiIX/+g A1FZCZIpkhc6XGrqGZ2EeWWRJHugY9yCHsQwoRcOlDZXqrCrnzPD+k46UJ0986SxV7GEej61RHM 4uHp8CtucXa2/bipiufcwY6/f0CZ3GD3qb3STanv8bR9XGemR9GogD/pwlHq6OPMUwLpDpwBM26 4Rqq/wWy1dsbj16FwtEj5klmrqO82XCiROQ2S5RFHaAFaB6uLSyreRHl32XAr3dZU= X-Received: by 2002:a17:902:e5c4:b0:2ad:6f9b:7818 with SMTP id d9443c01a7336-2b04223ffffmr445ad.23.1773422134975; Fri, 13 Mar 2026 10:15:34 -0700 (PDT) Received: from google.com (154.52.125.34.bc.googleusercontent.com. [34.125.52.154]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2aece85e9dfsm27191075ad.87.2026.03.13.10.15.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 10:15:34 -0700 (PDT) Date: Fri, 13 Mar 2026 17:15:29 +0000 From: Carlos Llamas To: Sami Tolvanen Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Peter Zijlstra , Josh Poimboeuf , Ard Biesheuvel , Mark Rutland , Kees Cook , Quentin Perret , Steven Rostedt , Will McVicker , Sean Christopherson , kernel-team@android.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7] arm64: implement support for static call trampolines Message-ID: References: <20260313061852.4025964-1-cmllamas@google.com> <20260313164856.GB213695@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260313164856.GB213695@google.com> On Fri, Mar 13, 2026 at 04:48:56PM +0000, Sami Tolvanen wrote: > On Fri, Mar 13, 2026 at 06:18:52AM +0000, Carlos Llamas wrote: > > From: Ard Biesheuvel > > > > Implement arm64 support for the 'unoptimized' static call variety, which > > routes all calls through a single trampoline that is patched to perform a > > tail call to the selected function. > > > > Since static call targets may be located in modules loaded out of direct > > branching range, we need to use a ADRP/ADD pair to load the branch target > > into R16 and use a branch-to-register (BR) instruction to perform an > > indirect call. Unlike on x86, there is no pressing need on arm64 to avoid > > indirect calls at all cost, but hiding it from the compiler as is done > > here does have some benefits: > > - the literal is located in .rodata, which gives us the same robustness > > advantage that code patching does; > > - no performance hit on CFI enabled Clang builds that decorate compiler > > emitted indirect calls with branch target validity checks. > > > > Cc: Peter Zijlstra (Intel) > > Signed-off-by: Ard Biesheuvel > > Signed-off-by: Carlos Llamas > > Does this need a Co-developed-by tag as well? The bulk of modifications came from the rebase itself and suggestions from Ard. I skipped the Co-developed-by tag for this reason. > > > --- > > v7: > > - Took Ard's v3 patch (as it leaves the code patching logic out) and > > rebased it on top of mainline 7.0-rc3. > > - Dropped the changes to arch/arm64/lib/insn.c and instead switched to > > the (now) existing aarch64_insn_write_literal_u64(). > > - Added the RET0 trampoline define which points to the generic stub > > __static_call_return0. > > - Made the HAVE_STATIC_CALL conditional on CFI as suggested by Ard. > > - Added .type and .size sections to the trampoline definition to > > support ABI tools. > > > > arch/arm64/Kconfig | 1 + > > arch/arm64/include/asm/static_call.h | 33 ++++++++++++++++++++++++++++ > > arch/arm64/kernel/Makefile | 1 + > > arch/arm64/kernel/static_call.c | 20 +++++++++++++++++ > > arch/arm64/kernel/vmlinux.lds.S | 1 + > > 5 files changed, 56 insertions(+) > > create mode 100644 arch/arm64/include/asm/static_call.h > > create mode 100644 arch/arm64/kernel/static_call.c > > > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > > index 38dba5f7e4d2..9ea19b74b6c3 100644 > > --- a/arch/arm64/Kconfig > > +++ b/arch/arm64/Kconfig > > @@ -252,6 +252,7 @@ config ARM64 > > select HAVE_RSEQ > > select HAVE_RUST if RUSTC_SUPPORTS_ARM64 > > select HAVE_STACKPROTECTOR > > + select HAVE_STATIC_CALL if CFI > > select HAVE_SYSCALL_TRACEPOINTS > > select HAVE_KPROBES > > select HAVE_KRETPROBES > > diff --git a/arch/arm64/include/asm/static_call.h b/arch/arm64/include/asm/static_call.h > > new file mode 100644 > > index 000000000000..331580542fd4 > > --- /dev/null > > +++ b/arch/arm64/include/asm/static_call.h > > @@ -0,0 +1,33 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +#ifndef _ASM_STATIC_CALL_H > > +#define _ASM_STATIC_CALL_H > > + > > +#define __ARCH_DEFINE_STATIC_CALL_TRAMP(name, target) \ > > + asm(" .pushsection .static_call.text, \"ax\" \n" \ > > + " .align 3 \n" \ > > + " .globl " STATIC_CALL_TRAMP_STR(name) " \n" \ > > + STATIC_CALL_TRAMP_STR(name) ": \n" \ > > + " hint 34 /* BTI C */ \n" \ > > It doesn't really matter either way, but do we still support toolchains > that don't understand "bti c"? I tested with this early. A 8.2 gcc from the arm archives and it failed to build: Error: selected processor does not support `bti c' However, this was _before_ I added the conditional on CFI. Maybe clang doesn't have this problem and technically speaking CFI would gate the "bti c" usage? Because you can't have CFI and "old" gcc. The CFI conditional might be later removed though so maybe lets keep it as is? -- Carlos Llamas