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([2600:8803:e7e4:500:6d3b:e3bd:4210:32e2]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7c0f915eed4sm1027277a34.36.2025.10.10.10.55.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Oct 2025 10:55:38 -0700 (PDT) Message-ID: Date: Fri, 10 Oct 2025 12:55:36 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] iio: health: max30100: Add pulse-width configuration via DT To: Shrikant Raskar , jic23@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: nuno.sa@analog.com, andy@kernel.org, matt@ranostay.sg, skhan@linuxfoundation.org, david.hunter.linux@gmail.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kernel-mentees@lists.linux.dev References: <20251008031737.7321-1-raskar.shree97@gmail.com> <20251008031737.7321-3-raskar.shree97@gmail.com> Content-Language: en-US From: David Lechner In-Reply-To: <20251008031737.7321-3-raskar.shree97@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/7/25 10:17 PM, Shrikant Raskar wrote: ... > --- a/drivers/iio/health/max30100.c > +++ b/drivers/iio/health/max30100.c > @@ -5,7 +5,6 @@ > * Copyright (C) 2015, 2018 > * Author: Matt Ranostay > * > - * TODO: enable pulse length controls via device tree properties > */ > > #include > @@ -54,6 +53,10 @@ > #define MAX30100_REG_SPO2_CONFIG 0x07 > #define MAX30100_REG_SPO2_CONFIG_100HZ BIT(2) > #define MAX30100_REG_SPO2_CONFIG_HI_RES_EN BIT(6) > +#define MAX30100_REG_SPO2_CONFIG_PW_MASK GENMASK(1, 0)> +#define MAX30100_REG_SPO2_CONFIG_200US 0x0 > +#define MAX30100_REG_SPO2_CONFIG_400US 0x1 > +#define MAX30100_REG_SPO2_CONFIG_800US 0x2 > #define MAX30100_REG_SPO2_CONFIG_1600US 0x3 Would make more sense to put this new code before BIT(2) to preserve the order of lowest to highest bits.