From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37D82242D9B; Mon, 16 Mar 2026 01:41:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773625266; cv=none; b=rNeDfeUrB2Za6ys12BNQRHKGMK6SW6UURcdrk8m8yy9bsz3594mNI4tOr+DmOeEA1eTjpFUFvNJ0GmBCWqvaNEbrtXws+2xLefmU4oRhQNdNWJMzyRV+WYZwVuxC7xJK9v9U0cTxViA0fPeH/HnoBOrmck3Bh1YzgGSvn2HvBWI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773625266; c=relaxed/simple; bh=+zrryHUg8/bVE6Yv1L0PSu02nfjsqtyzt8BBmAqU7So=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=TKPozRX95BvtMKauzgM9GQNdpaGTnpZfJ6q7ojzqIzOEpPUPiqw8UZHn58FXcr6I9lVOtxAUdvE0yHd2Kw3F3kcHbf3d1vYpjYUB+RjJX6SunS+nguItIZt2uCAc6iLKcsV7K7YG2PZvsYLEzulsHnpUdJZa+WGr+sfSis8+SWE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mWtTpDjS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mWtTpDjS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F1DD6C4CEF7; Mon, 16 Mar 2026 01:41:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773625266; bh=+zrryHUg8/bVE6Yv1L0PSu02nfjsqtyzt8BBmAqU7So=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=mWtTpDjSirvxx+mPHVfb83yAeIVflYWZiM76WBWWtZ/GeCSluumt0ulYfM2mfnaXk e0tQFsuCakhTzWCgwNLys6xdUn+GBN/D08nsTngmSTQxC6tAKxhuEGtZJXYAee4DBZ rbb2Xq1zkdLvSUuMDzwcov/yHduTgo4y27vphC+s6tiuUJTuRrOzn+azCLjnnUWQ2q c9d1XS7HANwi0wupdmP6BtcSeDXG8ROlHb0twmXBfSY/BipnZXtCYButT1CsXQrqpf S0X4u3IClcRvU7+k1rS8/JZPZtXE+nMcu8JdSsU76dIvHRy+Z0CVZ7JHCXQWZf7+Ts jHJFEDVpuFfjg== Date: Sun, 15 Mar 2026 20:41:02 -0500 From: Bjorn Andersson To: Dmitry Baryshkov Cc: Konrad Dybcio , Rob Clark , Akhil P Oommen , Abel Vesa , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] soc: qcom: ubwc: disable bank swizzling for Glymur platform Message-ID: References: <20260228-fix-glymur-ubwc-v2-1-70819bd6a6b4@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Fri, Mar 06, 2026 at 05:15:32PM +0200, Dmitry Baryshkov wrote: > On Sat, Feb 28, 2026 at 08:34:27PM +0200, Dmitry Baryshkov wrote: > > Due to the way the DDR controller is organized on Glymur, hardware > > engineers strongly recommended disabling UBWC bank swizzling on Glymur. > > Follow that recommendation. > > > > Fixes: 9b21c3bd2480 ("soc: qcom: ubwc: Add configuration Glymur platform") > > Signed-off-by: Dmitry Baryshkov > > --- > > Changes in v2: > > - Fix the syntax error... > > - Link to v1: https://lore.kernel.org/r/20260228-fix-glymur-ubwc-v1-1-d80e3fe0dcc7@oss.qualcomm.com > > --- > > drivers/soc/qcom/ubwc_config.c | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c > > index 1c25aaf55e52..8304463f238a 100644 > > --- a/drivers/soc/qcom/ubwc_config.c > > +++ b/drivers/soc/qcom/ubwc_config.c > > @@ -231,8 +231,7 @@ static const struct qcom_ubwc_cfg_data x1e80100_data = { > > static const struct qcom_ubwc_cfg_data glymur_data = { > > .ubwc_enc_version = UBWC_5_0, > > .ubwc_dec_version = UBWC_5_0, > > - .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | > > - UBWC_SWIZZLE_ENABLE_LVL3, > > + .ubwc_swizzle = 0, > > .ubwc_bank_spread = true, > > /* TODO: highest_bank_bit = 15 for LP_DDR4 */ > > .highest_bank_bit = 16, > > Carrying over from v1 discussion. > > Reviewed-by: Akhil P Oommen > > It depends on the fix which is currently a part of msm-fixes for the > device to function correctly. Raised the question on IRC regarding the > immutable tag or any other proper way to merge it. > Sorry, I did see your question on IRC, but didn't follow up and forgot to ask about it. What do you mean with "depends on"? Why do we need an immutable tag? Regards, Bjorn > > > > --- > > base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f > > change-id: 20260228-fix-glymur-ubwc-f673d5ca0581 > > > > Best regards, > > -- > > With best wishes > > Dmitry > > > > -- > With best wishes > Dmitry