From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C3F8A1DFFB for ; Mon, 16 Mar 2026 17:54:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773683663; cv=none; b=Qx0Qnm50LTMW/Dnx5kgOw04dTTXAEnknPg++1WFPa717FyYGjchHD1jv5p4IG+zCTAlitOmQfVCzGjC6HEcjtcv6P56iwOhcvpCjeCqoE84xAKzGQ46Ds+49gYan+Zn58KQq3t/oVnFHHjjohWoNuVopsRIq31ILUDkg0SXW0oY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773683663; c=relaxed/simple; bh=5BHiCPiqnQIgYZJnbREn/2XZ24D6pG4sIfBxdE7WUKE=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=cwn26IBeoE9nBr+9iXzEn1oP33zOWlgCIXEo9oDMcovpeONmB1Y96u7uBeG9hkbz03yIvp+LoBNGCXF5Ib8R4i2hYDyXeLqxTXLaFIhwe+zZAc+OQv+y8gM9rmySoMIP3zYU7rpWfOnY03RgIv+XztOZq5YOnMjFR1sbnD4G4/4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 14C5C1476; Mon, 16 Mar 2026 10:54:15 -0700 (PDT) Received: from arm.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D8FD53F73B; Mon, 16 Mar 2026 10:54:19 -0700 (PDT) Date: Mon, 16 Mar 2026 17:54:17 +0000 From: Catalin Marinas To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, aneesh.kumar@kernel.org, steven.price@arm.com, Will Deacon Subject: Re: [PATCH] arm64: realm: Fix PTE_NS_SHARED for 52bit PA support Message-ID: References: <20260316161901.2410354-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260316161901.2410354-1-suzuki.poulose@arm.com> On Mon, Mar 16, 2026 at 04:19:01PM +0000, Suzuki K Poulose wrote: > With LPA/LPA2, the top bits of the PFN (Bits[51:48]) end up in the lower bits > of the PTE. So, simply creating a mask of the "top IPA bit" doesn't work well > for these configurations to set the "top" bit at the output of Stage1 > translation. > > Fix this by using the __phys_to_pte_val() to do the right thing for all > configurations. > > Tested using, kvmtool, placing the memory at a higher address (-m @). > > e.g: > # lkvm run --realm -c 4 -m 512M@@128T -k Image --console serial > > sh-5.0# dmesg | grep "LPA2\|RSI" > [ 0.000000] RME: Using RSI version 1.0 > [ 0.000000] CPU features: detected: 52-bit Virtual Addressing (LPA2) > [ 0.777354] CPU features: detected: 52-bit Virtual Addressing for KVM (LPA2) > > Fixes: 399306954996 ("arm64: realm: Query IPA size from the RMM") > Cc: Catalin Marinas > Cc: Steven Price > Cc: Will Deacon > Signed-off-by: Suzuki K Poulose Reviewed-by: Catalin Marinas